[PATCH v5 4/6] drm/xe/vf: Add bounds checking for queried GGTT base and size

Satyanarayana K V P <[email protected]>
Newsgroups org.freedesktop.lists.intel-xe
Message-ID <[email protected]>
Add explicit bounds checks for GGTT base and size which can detect
and reject invalid configuration data from a misconfigured or
malfunctioning PF, preventing protocol violations and protecting VF
initialization.

Signed-off-by: Satyanarayana K V P <[email protected]>
Cc: Michal Wajdeczko <[email protected]>
---
V4 -> V5:
- New commit.
---
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 81d68fe5ad7c..65e48f135801 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -486,8 +486,16 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
 	return value;
 }
 
+static u64 vf_get_ggtt_alignment(struct xe_gt *gt)
+{
+	struct xe_device *xe = gt_to_xe(gt);
+
+	return IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
+}
+
 static int vf_get_ggtt_info(struct xe_gt *gt)
 {
+	u64 alignment = vf_get_ggtt_alignment(gt);
 	struct xe_tile *tile = gt_to_tile(gt);
 	struct xe_guc *guc = &gt->uc.guc;
 	u64 start, size, ggtt_size;
@@ -526,6 +534,18 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
 		return -EREMCHG;
 	}
 
+	if (size % alignment) {
+		xe_gt_sriov_err(gt, "Unexpected GGTT alignment for size: %llu != %llu\n",
+				size, (size / alignment) * alignment);
+		return -EREMCHG;
+	}
+
+	if (start % alignment) {
+		xe_gt_sriov_err(gt, "Unexpected GGTT alignment for base: %llu != %llu\n",
+				start, (start / alignment) * alignment);
+		return -EREMCHG;
+	}
+
 	xe_gt_sriov_dbg_verbose(gt, "GGTT %#llx-%#llx = %lluK\n",
 				start, start + size - 1, size / SZ_1K);
 
-- 
2.53.0
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