✗ CI.checkpatch: warning for drm/xe: Update Wa_140 26539277

== Series Details ==

Series: drm/xe: Update Wa_14026539277
URL   : https://patchwork.freedesktop.org/series/172611/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 34e373c10b4bed0798def42346f617db75ed7457
Author: Gustavo Sousa <[email protected]>
Date:   Fri Aug 21 18:36:49 2026 -0300

    drm/xe: Add up-to-date implementation for Wa_14026539277
    
    Wa_14026539277 is a temporary workaround that targets only A*
    steppings of graphics version 35.10 and requires that we avoid using
    2-way coherency for device-cacheable memory accesses.  For
    driver-internal usage, we convert those configurations to be
    device-uncached and 1-way-coherent; on the UAPI side, we reject
    VM_BIND/MADVISE calls that are 2-way-coherent and leave it up to
    userspace to select the alternative option that is most appropriate to
    their usage.
    
    v2:
      - Add missing bits to convert the PAT value to device-uncacheable in
        wa_14026539277_fixup_pat_value(). (Sashiko)
      - Also validate the PAT index in the DRM_XE_VM_MADVISE
        ioctl. (Sashiko)
      - Match against the graphics IP instead of the platform.
    v3:
      - Handle any 2-way-coherent PAT index irrespective of L3 cache
        policy, because L3 UC can be promoted to cached by MOCS. (Matt)
    
    Cc: José Roberto de Souza <[email protected]>
    Cc: Filip Hazubski <[email protected]>
    Reviewed-by: Matthew Auld <[email protected]>
    Signed-off-by: Gustavo Sousa <[email protected]>
+ /mt/dim checkpatch 58d59a40e2a041d3c159fab8bf5d5dc19d28da6c drm-intel
d6af86deff52 drm/xe: Extract override_has_cached_pt()
5a247e796589 Revert "drm/xe/nvlp: Implement Wa_14026539277"
34e373c10b4b drm/xe: Add up-to-date implementation for Wa_14026539277
-:120: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#120: FILE: drivers/gpu/drm/xe/xe_pat.c:417:
+					  wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value));

total: 0 errors, 1 warnings, 0 checks, 187 lines checked