[PATCH 0/5] arm: socfpga: agilex5: cleanup SDRAM initialization

The Agilex5 SDRAM initialization contains some obscure and unclear
workarounds, which are supposedly necessary for a successful SDRAM
initialization.

I observed a race condition between the IOSSM firmware, which is
responsible for the SDRAM initialization, and barebox. I assume this
race is responsible for the observed initialization failures.

Add an explicit workaround including documentation for the race
condition and remove the other workarounds.

Signed-off-by: Michael Tretter <[email protected]>
---
Michael Tretter (5):
      arm: socfpga: agilex5: separate EL3 init function
      arm: socfpga: agilex5: panic if DDR init failed
      arm: socfpga: iossm: add delay to wait for firmware
      arm: socfpga: agilex5: drop dual port hack
      arm: socfpga: agilex5: drop bank select before ddr_init

 arch/arm/mach-socfpga/agilex5-sdram.c | 10 ++--------
 arch/arm/mach-socfpga/atf.c           | 32 +++++++++++++++++---------------
 arch/arm/mach-socfpga/iossm_mailbox.c | 23 ++++++++++++++++++++---
 3 files changed, 39 insertions(+), 26 deletions(-)
---
base-commit: 9f6b78063a365b5b2674663ba844fa928937f203
change-id: 20260604-socfpga-axe5-sdram-init-254ac55cd385

Best regards,
-- 
Michael Tretter <[email protected]>