[PATCH] ARM: mmu: panic when calling flush_cacheable_pages with zero size

It's probably always a bug to end up here with a size of zero, but
region_end becoming -1 is a sure way to run into confusing issues.

Just throw the towel in this case, so the user can make sense of the
backtrace.

Reported-by: Ben Pye # Matrix
Signed-off-by: Ahmad Fatoum <[email protected]>
---
 arch/arm/cpu/flush_cacheable_pages.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/cpu/flush_cacheable_pages.h b/arch/arm/cpu/flush_cacheable_pages.h
index a03e10810dc7..b8574d77cdef 100644
--- a/arch/arm/cpu/flush_cacheable_pages.h
+++ b/arch/arm/cpu/flush_cacheable_pages.h
@@ -28,6 +28,8 @@ static void flush_cacheable_pages(void *start, size_t size)
 	size_t block_size;
 	mmu_addr_t *ttb;
 
+	BUG_ON(!size);
+
 	region_start = PAGE_ALIGN_DOWN((ulong)start);
 	region_end = PAGE_ALIGN(region_start + size) - 1;
 
-- 
2.47.3