Re: [PATCH 17/19] usb: ehci: minor fixes for Marvell compatibility

On 2026-07-23 15:57, Luca Lauro via B4 Relay wrote:
> From: Luca Lauro <[email protected]>
>=20
> ---
>  drivers/usb/host/ehci-hcd.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
>=20
> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> index 51b9e52a4f..b72436b312 100644
> --- a/drivers/usb/host/ehci-hcd.c
> +++ b/drivers/usb/host/ehci-hcd.c
> @@ -857,8 +857,6 @@ static int ehci_init(struct usb_host *host)
>  	struct QH *periodic;
>  	int i;
> =20
> -	ehci_halt(ehci);
> -
>  	/* EHCI spec section 4.1 */
>  	if (ehci_reset(ehci) !=3D 0)
>  		return -1;
> @@ -870,16 +868,16 @@ static int ehci_init(struct usb_host *host)
>  	}
> =20
>  	ehci->qh_list[0].qh_link =3D cpu_to_hc32(ehci_qh_dma(ehci, &ehci->qh_li=
st[1]) |
> -					       QH_LINK_TYPE_QH);
> +									QH_LINK_TYPE_QH);

Please drop the whitespace-only changes in this patch.

>From what is left: It deserves a better description why the changes are
necessary. We can always read *what* is being done from the patch, but
the most important thing for future readers is *why* it has been done.

Sascha

>  	ehci->qh_list[0].qh_endpt1 =3D cpu_to_hc32(QH_ENDPT1_H(1) |
> -						 QH_ENDPT1_EPS(USB_SPEED_HIGH));
> +									QH_ENDPT1_EPS(USB_SPEED_HIGH));
>  	ehci->qh_list[0].qh_curtd =3D cpu_to_hc32(QT_NEXT_TERMINATE);
>  	ehci->qh_list[0].qt_next =3D cpu_to_hc32(QT_NEXT_TERMINATE);
>  	ehci->qh_list[0].qt_altnext =3D cpu_to_hc32(QT_NEXT_TERMINATE);
>  	ehci->qh_list[0].qt_token =3D cpu_to_hc32(QT_TOKEN_STATUS_HALTED);
> =20
>  	ehci->qh_list[1].qh_link =3D cpu_to_hc32(ehci_qh_dma(ehci,
> -							   &ehci->qh_list[0]) |
> +									&ehci->qh_list[0]) |
>  					       QH_LINK_TYPE_QH);
>  	ehci->qh_list[1].qt_altnext =3D cpu_to_hc32(QT_NEXT_TERMINATE);
> =20
> @@ -897,6 +895,8 @@ static int ehci_init(struct usb_host *host)
>  	periodic->qt_next =3D cpu_to_hc32(QT_NEXT_TERMINATE);
>  	periodic->qt_altnext =3D cpu_to_hc32(QT_NEXT_TERMINATE);
> =20
> +	ehci->periodic_queue_dma =3D ehci_qh_dma(ehci, periodic);
> +
>  	/*
>  	 * Step 2: Setup frame-list: Every microframe, USB tries the same list.
>  	 *         In particular, device specifications on polling frequency
> @@ -906,23 +906,23 @@ static int ehci_init(struct usb_host *host)
>  	 *         Split Transactions will be spread across microframes using
>  	 *         S-mask and C-mask.
>  	 */
> -	if (ehci->periodic_list =3D=3D NULL)
> +	if (ehci->periodic_list =3D=3D NULL) {
> +		ehci->periodic_list =3D dma_alloc_coherent(DMA_DEVICE_BROKEN, 1024 * 4,
> +								&ehci->periodic_list_dma);
>  		/*
>  		 * FIXME: this memory chunk have to be 4k aligned AND
>  		 * reside in coherent memory. Current implementation of
>  		 * dma_alloc_coherent() allocates PAGE_SIZE aligned memory chunks.
>  		 * PAGE_SIZE less then 4k will break this code.
>  		 */
> -		ehci->periodic_list =3D dma_alloc_coherent(DMA_DEVICE_BROKEN, 1024 * 4,
> -						&ehci->periodic_list_dma);
>  	for (i =3D 0; i < 1024; i++) {
> -		ehci->periodic_list[i] =3D cpu_to_hc32((unsigned long)ehci->periodic_q=
ueue_dma
> -						| QH_LINK_TYPE_QH);
> +		ehci->periodic_list[i] =3D cpu_to_hc32(ehci->periodic_queue_dma
> +									| QH_LINK_TYPE_QH);
>  	}
> =20
>  	/* Set periodic list base address */
>  	ehci_writel(&ehci->hcor->or_periodiclistbase,
> -		    (uint32_t)ehci->periodic_list_dma);
> +		    ehci->periodic_list_dma);
> =20
>  	reg =3D ehci_readl(&ehci->hccr->cr_hcsparams);
>  	descriptor.hub.bNbrPorts =3D HCS_N_PORTS(reg);
>=20
> --=20
> 2.47.3
>=20
>=20
>=20

--=20
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