Re: Re: [RFC PATCH 01/11] iommupt: Add RISC-V Second-stage (iohgatp) page table support
Jason Gunthorpe <[email protected]>
| Newsgroups | org.infradead.lists.kvm-riscv,dev.linux.lists.iommu,org.infradead.lists.linux-riscv,org.kernel.vger.kvm,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On Wed, Apr 29, 2026 at 09:06:50AM +0800, [email protected] wrote: > >> @@ -263,6 +281,22 @@ riscvpt_iommu_fmt_init(struct pt_iommu_riscv_64 *iommu_table, > >> case 57: > >> pt_top_set_level(&table->common, 4); > >> break; > >> + /* > >> + * Second-stage (iohgatp): Sv39x4 / Sv48x4 / Sv57x4. > >> + * The top level is the same as for the first-stage counterpart. > >> + */ > >> + case 41: > >> + pt_top_set_level(&table->common, 2); > >> + table->second_stage = true; > >> + break; > > > >Second stage needs to be an explicit PT_FEAT not implicitly deduced > >based on the vasz. > > Agreed. I will add an explicit PT_FEAT_RISCV_SECOND_STAGE flag and > stop deriving second-stage semantics from vasz. PT_FEAT_RISCV_S2 would match what I have for ARM Jason -- kvm-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kvm-riscv