[RFC PATCH v2 10/10] iommu/riscv: Add IOTINVAL.GVMA after updating DDT/PDT entries
| Newsgroups | org.infradead.lists.kvm-riscv,dev.linux.lists.iommu,org.infradead.lists.linux-riscv,org.kernel.vger.kvm,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Fangyu Yu <[email protected]> Previously, only IOTINVAL.VMA was issued, which is insufficient for second-stage address translation consistency. Signed-off-by: Fangyu Yu <[email protected]> --- drivers/iommu/riscv/iommu.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index b7944149dcfe..44dd268cc3ce 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -1065,12 +1065,15 @@ static void riscv_iommu_iodir_iotinval(struct riscv_iommu_device *iommu, /* * else: IOTINVAL.VMA with GV=1,AV=PSCV=0,and * GSCID=DC.iohgatp.GSCID - * + */ + riscv_iommu_cmd_send(iommu, &cmd); + /* * IOTINVAL.GVMA with GV=1,AV=0,and * GSCID=DC.iohgatp.GSCID - * TODO: For now, the Second-Stage feature have not yet been merged, - * also issue IOTINVAL.GVMA once second-stage support is merged. */ + riscv_iommu_cmd_inval_gvma(&cmd); + riscv_iommu_cmd_inval_set_gscid(&cmd, + FIELD_GET(RISCV_IOMMU_DC_IOHGATP_GSCID, iohgatp)); } riscv_iommu_cmd_send(iommu, &cmd); } -- 2.50.1 -- kvm-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kvm-riscv