Re: [PATCH 01/16] riscv: Introduce instruction table generation
Charlie Jenkins <[email protected]>
| Newsgroups | org.infradead.lists.kvm-riscv,org.infradead.lists.linux-riscv,org.kernel.vger.kvm,org.kernel.vger.linux-kernel,org.kernel.vger.linux-kselftest |
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| Message-ID | <ajDmAmq4_hYCDEfp@blinky> |
On Thu, Jun 11, 2026 at 07:21:37AM +0200, Nam Cao wrote: > Charlie Jenkins <[email protected]> writes: > > This is a weird one. The Ziclsd extension introduces it for RV32[1]. All > > of the data is generated from the riscv-unified-db and because it is in > > the Ziclsd extension, c.ld is included for 32-bit in the c.ld > > description [2]. > > Oh :( We probably should amend the base spec to mention that. > > >> > + compressed_name=${name##c.*} > >> ^^^^^^^^^^^^^^^ > >> this name is misleading > > > > That's fair, I can rename it to be something like "compressed_inst"? > > My issue is that "compressed_name" indicates that it holds the > compressed variant of the name. But it actually is empty if the > instruction is compressed, otherwise it is the original instruction name. > > I am not sure what is a better name. Perhaps just inline this to the > usage below. Oh I see, I'll come up with a name that is more clear on inline it. > > Nam -- kvm-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/kvm-riscv