Re: [GIT PULL] KVM/riscv changes for 7.3

On Sun, Aug 16, 2026 at 6:30 PM Anup Patel <[email protected]> wrote:
>
> Hi Paolo,
>
> There is a small conflict between the kvm-riscv tree and the riscv tree which
> slipped through the cracks. This conflict will appear at your end if the 7.3
> pull-request from RISC-V tree is merged before your 7.3 pull-request.
>
> This can be resolved as follows:
>
> diff --cc arch/riscv/kvm/vcpu_vector.c
> index 3c3183b39ae2a,bf5c94d8786b5..0000000000000
> --- a/arch/riscv/kvm/vcpu_vector.c
> +++ b/arch/riscv/kvm/vcpu_vector.c
> @@@ -56,9 -56,8 +56,8 @@@ void kvm_riscv_vcpu_guest_vector_restor
>                                          unsigned long *isa)
>   {
>         if ((cntx->sstatus & SR_VS) != SR_VS_OFF) {
>  -              if (riscv_isa_extension_available(isa, v))
>  +              if (riscv_isa_extension_available(isa, V))
> -                       __kvm_riscv_vector_restore(cntx);
> -               kvm_riscv_vcpu_vector_clean(cntx);
> +                       riscv_v_flags_set(riscv_v_flags() |
> RISCV_V_VCPU_NEED_RESTORE);
>         }
>   }
>
> Best Regards,
> Anup

Thanks, pulled now.

Paolo

>
>
> On Sat, Aug 15, 2026 at 4:28 PM Anup Patel <[email protected]> wrote:
> >
> > Hi Paolo,
> >
> > We have the following KVM RISC-V changes for 7.3:
> > 1) Svadu/Zicfiss/Zicfilp FWFT support for Guest
> > 2) Use try_cmpxchg for IMSIC MRIF RMW
> > 3) More arch-specific tracepoints in KVM RISC-V
> > 4) Eager Page Splitting for KVM RISC-V
> > 5) Optimize hfence request handling for SMP Guests
> > 6) Improve dirty log clearing by skipping zero bits in mask
> > 7) Guard HFENCE range loops against overflow
> > 8) CPU PM notifiers in KVM RISC-V for non-retentive idle states
> > 9) Fix kernel-mode vector context save/restore for Guest
> >
> > In addition to the above, we also have a few small fixes such as
> > limit checks, array overflow checks, data type changes, etc.
> >
> > Please pull.
> >
> > Regards,
> > Anup
> >
> > The following changes since commit f5098b6bae761e346ebcd9da7f95622c04733cff:
> >
> >   Linux 7.2-rc5 (2026-07-26 14:45:48 -0700)
> >
> > are available in the Git repository at:
> >
> >   https://github.com/kvm-riscv/linux.git tags/kvm-riscv-7.3-1
> >
> > for you to fetch changes up to b5060a4aa33d7d78a8c1837ab08ef0c81ea96650:
> >
> >   RISC-V: KVM: fix vcpu vector context handling for kernel-mode vector
> > (2026-08-13 13:20:02 +0530)
> >
> > ----------------------------------------------------------------
> > KVM/riscv changes for 7.3
> >
> > - Svadu/Zicfiss/Zicfilp FWFT support for Guest
> > - Use try_cmpxchg for IMSIC MRIF RMW
> > - More arch-specific tracepoints in KVM RISC-V
> > - Eager Page Splitting for KVM RISC-V
> > - Optimize hfence request handling for SMP Guests
> > - Improve dirty log clearing by skipping zero bits in mask
> > - Guard HFENCE range loops against overflow
> > - CPU PM notifiers in KVM RISC-V for non-retentive idle states
> > - Fix kernel-mode vector context save/restore for Guest
> >
> > ----------------------------------------------------------------
> > Andy Chiu (3):
> >       riscv: vector: refactor riscv_v_start_kernel_context
> >       riscv: vector: allow non-preemptible kernel-mode vector with IRQs off
> >       RISC-V: KVM: fix vcpu vector context handling for kernel-mode vector
> >
> > Bingyu.Xian (2):
> >       RISC-V: KVM: Use unsigned int for vma_pageshift
> >       RISC-V: KVM: Widen G-stage fault address to gpa_t
> >
> > Guidong Han (1):
> >       RISC-V: KVM: Fix PMU event info array size overflow
> >
> > Inochi Amaoto (11):
> >       RISC-V: KVM: Add support for Svadu FWFT features
> >       KVM: riscv: selftests: add Svadu FWFT extension to get-reg-list test
> >       RISC-V: KVM: Allow Zicfiss/Zicfilp extensions for Guest/VM
> >       RISC-V: KVM: Add ssp context save/restore
> >       RISC-V: KVM: Handle software-check exits for VCPU
> >       RISC-V: KVM: Add support for control-flow integrity FWFT features
> >       KVM: riscv: selftests: add Zicfiss/Zicfilp extension to get-reg-list test
> >       RISC-V: KVM: Add SBI extension validate callback
> >       RISC-V: KVM: Add SBI FWFT validation support
> >       RISC-V: KVM: Reset the SBI extension when disable it
> >       RISC-V: KVM: Mark the reset callback of FWFT extension always dirties CSR
> >
> > Pengpeng Hou (4):
> >       RISC-V: KVM: Allow memslots ending at the GPA limit
> >       RISC-V: KVM: Reject overlapping AIA IMSIC address fields
> >       RISC-V: KVM: Guard HFENCE range loops against overflow
> >       RISC-V: KVM: Avoid one-word masks for SBI v0.1 all-harts
> >
> > Wang Yechao (8):
> >       RISC-V: KVM: Add the split page cache for ioctl context
> >       RISC-V: KVM: Split huge pages when dirty logging is enabled
> >       RISC-V: KVM: Remove redundant TLB flush operations
> >       RISC-V: KVM: Split huge pages during KVM_CLEAR_DIRTY_LOG
> >       RISC-V: KVM: Add the eager_page_split module parameter
> >       RISC-V: KVM: Separate req and fallback_req masks in make_xfence_request
> >       RISC-V: KVM: Introduce make_xfence_request_nodata for FENCE.I requests
> >       RISC-V: KVM: Improve dirty log clearing by skipping zero bits in mask
> >
> > Yicong Yang (1):
> >       RISC-V: KVM: Use try_cmpxchg for IMSIC MRIF RMW
> >
> > Yong-Xuan Wang (2):
> >       KVM: RISC-V: Clear former VCPU cache on virtualization disable
> >       KVM: RISC-V: Add CPU PM notifier for non-retention idle states
> >
> > Yuhang.Chen (1):
> >       RISC-V: KVM: Add more arch-specific tracepoints
> >
> > Yuhang.chen (1):
> >       RISC-V: KVM: Account VM-scoped allocations to the VM cgroup
> >
> > Zongmin Zhou (1):
> >       KVM: riscv: Fix infinite loop in NACL hfence entry allocation
> >
> >  Documentation/admin-guide/kernel-parameters.txt  |   7 +-
> >  arch/riscv/include/asm/csr.h                     |   1 +
> >  arch/riscv/include/asm/kvm_aia.h                 |   3 +
> >  arch/riscv/include/asm/kvm_gstage.h              |   9 +-
> >  arch/riscv/include/asm/kvm_host.h                |  10 ++
> >  arch/riscv/include/asm/kvm_vcpu_insn.h           |   4 +-
> >  arch/riscv/include/asm/kvm_vcpu_sbi.h            |   4 +
> >  arch/riscv/include/asm/kvm_vcpu_vector.h         |  24 +++
> >  arch/riscv/include/asm/processor.h               |   8 +
> >  arch/riscv/include/asm/simd.h                    |  16 +-
> >  arch/riscv/include/asm/vector.h                  |   5 +
> >  arch/riscv/include/uapi/asm/kvm.h                |  13 ++
> >  arch/riscv/kernel/kernel_mode_vector.c           |  88 +++++++---
> >  arch/riscv/kvm/aia.c                             |  42 +++++
> >  arch/riscv/kvm/aia_aplic.c                       |   3 +-
> >  arch/riscv/kvm/aia_device.c                      |   6 +
> >  arch/riscv/kvm/aia_imsic.c                       |  18 +-
> >  arch/riscv/kvm/gstage.c                          |  82 ++++++++-
> >  arch/riscv/kvm/isa.c                             |   2 +
> >  arch/riscv/kvm/main.c                            | 112 ++++++++++--
> >  arch/riscv/kvm/mmu.c                             | 108 +++++++++++-
> >  arch/riscv/kvm/nacl.c                            |   2 +-
> >  arch/riscv/kvm/tlb.c                             | 117 ++++++++++---
> >  arch/riscv/kvm/trace.h                           |  81 ++++++++-
> >  arch/riscv/kvm/vcpu.c                            |  34 ++++
> >  arch/riscv/kvm/vcpu_config.c                     |   2 +
> >  arch/riscv/kvm/vcpu_exit.c                       |  20 ++-
> >  arch/riscv/kvm/vcpu_insn.c                       |  17 +-
> >  arch/riscv/kvm/vcpu_onereg.c                     |  68 +++++++-
> >  arch/riscv/kvm/vcpu_pmu.c                        |  16 +-
> >  arch/riscv/kvm/vcpu_sbi.c                        |  30 ++++
> >  arch/riscv/kvm/vcpu_sbi_fwft.c                   | 207 ++++++++++++++++++++++-
> >  arch/riscv/kvm/vcpu_sbi_v01.c                    |  52 +++---
> >  arch/riscv/kvm/vcpu_vector.c                     |  26 ++-
> >  tools/testing/selftests/kvm/riscv/get-reg-list.c |  90 ++++++++++
> >  35 files changed, 1169 insertions(+), 158 deletions(-)
>


-- 
kvm-riscv mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/kvm-riscv