[PATCH 3/3] arm64: dts: amlogic: a9: Add power domain controller node
Xianwei Zhao via B4 Relay <[email protected]> Wed, 22 Jul 2026 08:39:33 +0000
| Newsgroups | org.infradead.lists.linux-amlogic,org.infradead.lists.linux-arm-kernel,org.kernel.feeds.b4-sent,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pm |
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From: Xianwei Zhao <[email protected]> Add power domain controller node for Amlogic A9 SoC. Signed-off-by: Xianwei Zhao <[email protected]> --- arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi index b0e0fadeed82..3652b2034c96 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/amlogic,pinctrl.h> +#include <dt-bindings/power/amlogic,a9-pwrc.h> / { interrupt-parent = <&gic>; @@ -72,6 +73,15 @@ cpu7: cpu@700 { }; }; + sm: secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible = "amlogic,a9-pwrc"; + #power-domain-cells = <1>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, -- 2.52.0 _______________________________________________ linux-amlogic mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-amlogic