[RESEND PATCH v7 11/16] arm64: dts: st: add sdmmc2 pins for stm32mp25
Dario Binacchi <[email protected]>
| Newsgroups | org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add the sdmmc2 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi <[email protected]> --- (no changes since v5) Changes in v5: - Change SDMMC2_CK pin bias from pull-up to bias-disable to avoid signal integrity issues on the clock line. Suggested by Sashiko arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index 002fbc724b9d..c816a6aece47 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -622,6 +622,86 @@ pins { }; }; + /omit-if-no-ref/ + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins1 { + pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */ + <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */ + <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */ + <STM32_PINMUX('E', 12, AF12)>, /* SDMMC2_D3 */ + <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */ + <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */ + <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */ + <STM32_PINMUX('E', 12, AF12)>; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('E', 13, ANALOG)>, /* SDMMC2_D0 */ + <STM32_PINMUX('E', 11, ANALOG)>, /* SDMMC2_D1 */ + <STM32_PINMUX('E', 8, ANALOG)>, /* SDMMC2_D2 */ + <STM32_PINMUX('E', 12, ANALOG)>, /* SDMMC2_D3 */ + <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC2_CK */ + <STM32_PINMUX('E', 15, ANALOG)>; /* SDMMC2_CMD */ + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_pins_a: sdmmc2-d47-0 { + pins { + pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */ + <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */ + <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */ + <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { + pins { + pinmux = <STM32_PINMUX('E', 10, ANALOG)>, /* SDMMC2_D4 */ + <STM32_PINMUX('E', 9, ANALOG)>, /* SDMMC2_D5 */ + <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC2_D6 */ + <STM32_PINMUX('E', 7, ANALOG)>; /* SDMMC2_D7 */ + }; + }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 { -- 2.43.0