Re: [PATCH v4 2/3] dt-bindings: i3c: dw: Add apb reset

Jisheng Zhang <[email protected]>
Newsgroups org.infradead.lists.linux-i3c,org.kernel.vger.linux-devicetree
Message-ID <ahre-7YdlcOZkwS1@xhacker>
On Wed, May 27, 2026 at 09:53:16AM +0200, Krzysztof Kozlowski wrote:
> On 27/05/2026 06:18, Jisheng Zhang wrote:
> > On Mon, May 25, 2026 at 05:25:45PM +0200, Krzysztof Kozlowski wrote:
> >> On 25/05/2026 16:00, Jisheng Zhang wrote:
> >>> Add dt-binding for support of apb reset which is to reset the APB
> >>> interface.
> >>
> >> And this is ABI break, so you must explain WHY breaking ABI is worth
> > 
> > This just adds an optional apb reset, it doesn't break any exisiting
> > ABI. Kindly let me know whether adding new optional binding is also
> > an ABI break.
> 
> It does. One reset was before. Now all devices must have two resets.
> Clear ABI impact.

I checked the dts with only one reset by manual dt_binding_check
and dtbs_check, it still work, so I'm not sure why those dts "must have
two resets". Kindly let me know what's wrong.

> 
> > 
> >> doing that or what is the impact. Additionally you should explain which
> >> devices have it. Does Altera have it? You really lack explanation WHY
> >> you are doing it and which hardware you exactly describe.
> > 
> > I'm preparing one of synaptics SoCs support to uptream, it needs this
> > apb reset signal for i3c. So you mean I delay this series until the SoC
> > upstream series come, right?
> 
> No. You just sent patch which basically says that Altera has two resets,
> without any explanation of that.

I guess you mixed other series/patches with mine here, no? I didn't
mention Altera at all ;) What my series mentioned is adding apb reset
which is to reset the APB interface.


> 
> Write explicit patches with answers WHY you re doing and WHY its impact
> is correct.
> 
> 
> Best regards,
> Krzysztof

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