RE: RE: RE: [PATCH] i3c: master: dw-i3c-master: fix OD timing for first broadcast

AMD General

> -----Original Message-----
> From: NG, TZE YEE <[email protected]>
> Sent: Thursday, July 9, 2026 12:12 PM
> To: Guntupalli, Manikanta <[email protected]>; Datta,
> Shubhrajyoti <[email protected]>
> Cc: [email protected]; [email protected]; Frank Li
> <[email protected]>; Goud, Srinivas <[email protected]>
> Subject: Re: RE: RE: [PATCH] i3c: master: dw-i3c-master: fix OD timing for first
> broadcast
>
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>
> On 1/7/2026 5:06 pm, Guntupalli, Manikanta wrote:
> > Public
> >
> > Hi,
> >
> > Adding the below contact:
> > +@Datta, Shubhrajyoti
> >
> > Thanks,
> > Manikanta
> >
>
> Hi Manikanta, Datta,
>
> Gentle follow-up on the AMD AMDI0015 quirk question below. It has been
> about a week since Datta was brought into the thread, and I have not received
> guidance yet on how ->set_speed() and send_ccc_cmd() should interact with
> AMD_I3C_OD_PP_TIMING.

Will check this and get back.
>
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