Re: RE: RE: RE: [PATCH] i3c: master: dw-i3c-master: fix OD timing for first broadcast

On 9/7/2026 5:09 pm, Datta, Shubhrajyoti wrote:
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> AMD General
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>> -----Original Message-----
>> From: Datta, Shubhrajyoti
>> Sent: Thursday, July 9, 2026 2:30 PM
>> To: 'NG, TZE YEE' <[email protected]>; Guntupalli, Manikanta
>> <[email protected]>
>> Cc: [email protected]; [email protected]; Frank Li
>> <[email protected]>; Goud, Srinivas <[email protected]>
>> Subject: RE: RE: RE: [PATCH] i3c: master: dw-i3c-master: fix OD timing for first
>> broadcast
>>
>>
>>
>>> -----Original Message-----
>>> From: NG, TZE YEE <[email protected]>
>>> Sent: Thursday, July 9, 2026 12:12 PM
>>> To: Guntupalli, Manikanta <[email protected]>; Datta,
>>> Shubhrajyoti <[email protected]>
>>> Cc: [email protected]; [email protected]; Frank Li
>>> <[email protected]>; Goud, Srinivas <[email protected]>
>>> Subject: Re: RE: RE: [PATCH] i3c: master: dw-i3c-master: fix OD timing
>>> for first broadcast
>>>
>>> [You don't often get email from [email protected]. Learn why this
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>>> On 1/7/2026 5:06 pm, Guntupalli, Manikanta wrote:
>>>> Public
>>>>
>>>> Hi,
>>>>
>>>> Adding the below contact:
>>>> +@Datta, Shubhrajyoti
>>>>
>>>> Thanks,
>>>> Manikanta
>>>>
>>>
>>> Hi Manikanta, Datta,
>>>
>>> Gentle follow-up on the AMD AMDI0015 quirk question below. It has been
>>> about a week since Datta was brought into the thread, and I have not
>>> received guidance yet on how ->set_speed() and send_ccc_cmd() should
>>> interact with AMD_I3C_OD_PP_TIMING.
>>
>> Will check this and get back.
> This quirk is added for the AMD legacy platform
> https://lore.kernel.org/all/[email protected]/
>
> added shyam .

Hi Manikanta, Datta, Shyam,

Gentle follow-up. I still have not received confirmed guidance on how
->set_speed() should interact with AMD_I3C_OD_PP_TIMING on AMDI0015.

Rather than waiting further, I would like to continue the upstream
process with
- od_cnt calculation fix (per Sashiko's review)
- using  PM_RUNTIME_ACQUIRE (per Frank's review)
- send an AMD-specific follow-up based on a best-effort assumption for
the AMD quirk platform.

Could AMD help test that follow-up once posted?

If you prefer a different AMD behavior, please let me know; otherwise I
will proceed with that plan.

Thanks,
Tze Yee

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