[PATCH v9 14/36] pinctrl: airoha: add missed get_direction() function for gpio_chip
Mikhail Kshevetskiy <[email protected]> Tue, 4 Aug 2026 19:03:57 +0300
| Newsgroups | org.infradead.lists.linux-mediatek,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
This patch adds missed get_direction() function for gpio_chip.
Also it reimplements pinconf's get_direction() function using
newly defined function.
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
---
drivers/pinctrl/airoha/pinctrl-airoha.c | 50 +++++++++++++++++--------
1 file changed, 34 insertions(+), 16 deletions(-)
diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
index ad6d24e39c868..fa9284ee3b71b 100644
--- a/drivers/pinctrl/airoha/pinctrl-airoha.c
+++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
@@ -2523,6 +2523,22 @@ static int airoha_gpio_get(struct gpio_chip *chip, unsigned int gpio)
return err ? err : !!(val & BIT(pin));
}
+static int airoha_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
+{
+ struct airoha_pinctrl *pinctrl = gpiochip_get_data(chip);
+ u32 val, mask;
+ u8 index;
+ int err;
+
+ index = gpio / AIROHA_REG_GPIOCTRL_NUM_PIN;
+ err = regmap_read(pinctrl->regmap, pinctrl->gpiochip.dir[index], &val);
+ if (err)
+ return err;
+
+ mask = BIT(2 * (gpio % AIROHA_REG_GPIOCTRL_NUM_PIN));
+ return val & mask ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
+}
+
static int airoha_gpio_direction_output(struct gpio_chip *chip,
unsigned int gpio, int value)
{
@@ -2656,19 +2672,13 @@ static int airoha_pinctrl_add_gpiochip(struct airoha_pinctrl *pinctrl,
struct device *dev = &pdev->dev;
int irq, err;
- chip->data = gpio_data_regs;
- chip->dir = gpio_dir_regs;
- chip->out = gpio_out_regs;
- chip->status = irq_status_regs;
- chip->level = irq_level_regs;
- chip->edge = irq_edge_regs;
-
gc->parent = dev;
gc->label = dev_name(dev);
gc->request = gpiochip_generic_request;
gc->free = gpiochip_generic_free;
gc->direction_input = pinctrl_gpio_direction_input;
gc->direction_output = airoha_gpio_direction_output;
+ gc->get_direction = airoha_gpio_get_direction;
gc->set = airoha_gpio_set;
gc->get = airoha_gpio_get;
gc->base = -1;
@@ -2876,21 +2886,18 @@ static int airoha_pinctrl_set_conf(struct airoha_pinctrl *pinctrl,
static int airoha_pinconf_get_direction(struct pinctrl_dev *pctrl_dev, u32 p)
{
struct airoha_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
- u32 val, mask;
- int err, pin;
- u8 index;
+ int ret, pin;
pin = airoha_convert_pin_to_reg_offset(pctrl_dev, NULL, p);
if (pin < 0)
return pin;
- index = pin / AIROHA_REG_GPIOCTRL_NUM_PIN;
- err = regmap_read(pinctrl->regmap, pinctrl->gpiochip.dir[index], &val);
- if (err)
- return err;
+ ret = airoha_gpio_get_direction(&pinctrl->gpiochip.chip, pin);
+ if (ret < 0)
+ return ret;
- mask = BIT(2 * (pin % AIROHA_REG_GPIOCTRL_NUM_PIN));
- return val & mask ? PIN_CONFIG_OUTPUT_ENABLE : PIN_CONFIG_INPUT_ENABLE;
+ return ret == GPIO_LINE_DIRECTION_OUT ?
+ PIN_CONFIG_OUTPUT_ENABLE : PIN_CONFIG_INPUT_ENABLE;
}
static int airoha_pinconf_get(struct pinctrl_dev *pctrl_dev,
@@ -3136,6 +3143,17 @@ static int airoha_pinctrl_probe(struct platform_device *pdev)
pinctrl->desc.pins = data->pins;
pinctrl->desc.npins = data->num_pins;
+ /*
+ * some pinctrl operations (ex: get_direction) might use gpio registers
+ * before gpio chip abstraction will be completely initialized.
+ */
+ pinctrl->gpiochip.data = gpio_data_regs;
+ pinctrl->gpiochip.dir = gpio_dir_regs;
+ pinctrl->gpiochip.out = gpio_out_regs;
+ pinctrl->gpiochip.status = irq_status_regs;
+ pinctrl->gpiochip.level = irq_level_regs;
+ pinctrl->gpiochip.edge = irq_edge_regs;
+
err = devm_pinctrl_register_and_init(dev, &pinctrl->desc,
pinctrl, &pinctrl->ctrl);
if (err)
--
2.53.0