[PATCH v9 27/36] pinctrl: airoha: an7583: rename registers to match its an7583 names
Mikhail Kshevetskiy <[email protected]> Tue, 4 Aug 2026 19:04:10 +0300
| Newsgroups | org.infradead.lists.linux-mediatek,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
In the an7581 case the register at 0x1FA20214 is called RG_GPIO_2ND_I2C_MODE. The same register in the an7583 case is called RG_SW_TOD_1PPS_MODE. Let's rename this register to avoid potential confuse. Signed-off-by: Mikhail Kshevetskiy <[email protected]> --- drivers/pinctrl/airoha/pinctrl-an7583.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/airoha/pinctrl-an7583.c b/drivers/pinctrl/airoha/pinctrl-an7583.c index 6d195096495fe..44efccce78c55 100644 --- a/drivers/pinctrl/airoha/pinctrl-an7583.c +++ b/drivers/pinctrl/airoha/pinctrl-an7583.c @@ -8,7 +8,7 @@ #include "airoha-common.h" /* MUX */ -#define REG_GPIO_2ND_I2C_MODE 0x0214 +#define REG_SW_TOD_1PPS_MODE 0x0214 #define GPIO_LAN3_LED1_MODE_MASK BIT(10) #define GPIO_LAN3_LED0_MODE_MASK BIT(9) #define GPIO_LAN2_LED1_MODE_MASK BIT(8) @@ -302,7 +302,7 @@ .name = (gpio), \ .regmap[0] = { \ AIROHA_FUNC_MUX, \ - REG_GPIO_2ND_I2C_MODE, \ + REG_SW_TOD_1PPS_MODE, \ (mux_val), \ (mux_val), \ }, \ @@ -320,7 +320,7 @@ .name = (gpio), \ .regmap[0] = { \ AIROHA_FUNC_MUX, \ - REG_GPIO_2ND_I2C_MODE, \ + REG_SW_TOD_1PPS_MODE, \ (mux_val), \ (mux_val), \ }, \ @@ -643,7 +643,7 @@ static const struct airoha_pinctrl_func_group tod_1pps_func_group[] = { .name = "pon_tod_1pps", .regmap[0] = { AIROHA_FUNC_MUX, - REG_GPIO_2ND_I2C_MODE, + REG_SW_TOD_1PPS_MODE, PON_TOD_1PPS_MODE_MASK, PON_TOD_1PPS_MODE_MASK }, @@ -652,7 +652,7 @@ static const struct airoha_pinctrl_func_group tod_1pps_func_group[] = { .name = "gsw_tod_1pps", .regmap[0] = { AIROHA_FUNC_MUX, - REG_GPIO_2ND_I2C_MODE, + REG_SW_TOD_1PPS_MODE, GSW_TOD_1PPS_MODE_MASK, GSW_TOD_1PPS_MODE_MASK }, -- 2.53.0