[PATCH v9 30/36] pinctrl: airoha: an7583: add support for olt pinmux
Mikhail Kshevetskiy <[email protected]> Tue, 4 Aug 2026 19:04:13 +0300
| Newsgroups | org.infradead.lists.linux-mediatek,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add support for olt pin function for olt pin group. Signed-off-by: Mikhail Kshevetskiy <[email protected]> --- drivers/pinctrl/airoha/pinctrl-an7583.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pinctrl/airoha/pinctrl-an7583.c b/drivers/pinctrl/airoha/pinctrl-an7583.c index 2e145ef5a224c..031a8b36e0024 100644 --- a/drivers/pinctrl/airoha/pinctrl-an7583.c +++ b/drivers/pinctrl/airoha/pinctrl-an7583.c @@ -53,6 +53,7 @@ #define I2C0_SCL_GPIO_MODE_MASK BIT(15) #define GPIO_PARALLEL_NAND_MODE_MASK BIT(14) #define GPIO_SGMII_MDIO_MODE_MASK BIT(13) +#define GPIO_OLT_MODE_MASK BIT(12) #define SIPO_RCLK_MODE_MASK BIT(11) #define GPIO_PCIE_RESET1_MASK BIT(10) #define GPIO_PCIE_RESET0_MASK BIT(9) @@ -393,6 +394,7 @@ static struct pinctrl_pin_desc pinctrl_pins[] = { static const int pon_pins[] = { 15, 16, 17, 18, 19, 20 }; static const int pon_alt_pins[] = { 36, 37, 38, 39, 40 }; +static const int olt_pins[] = { 36, 37, 38, 39, 40 }; static const int pon_tod_1pps_pins[] = { 32 }; static const int gsw_tod_1pps_pins[] = { 32 }; static const int sipo_pins[] = { 34, 35 }; @@ -483,6 +485,7 @@ static const int pcie_reset1_pins[] = { 52 }; static const struct pingroup pinctrl_groups[] = { PINCTRL_PIN_GROUP("pon", pon), PINCTRL_PIN_GROUP("pon_alt", pon_alt), + PINCTRL_PIN_GROUP("olt", olt), PINCTRL_PIN_GROUP("pon_tod_1pps", pon_tod_1pps), PINCTRL_PIN_GROUP("gsw_tod_1pps", gsw_tod_1pps), PINCTRL_PIN_GROUP("sipo", sipo), @@ -568,6 +571,7 @@ static const struct pingroup pinctrl_groups[] = { }; static const char *const pon_groups[] = { "pon", "pon_alt" }; +static const char *const olt_groups[] = { "olt" }; static const char *const tod_1pps_groups[] = { "pon_tod_1pps", "gsw_tod_1pps" }; @@ -651,6 +655,19 @@ static const struct airoha_pinctrl_func_group pon_func_group[] = { }, }; +static const struct airoha_pinctrl_func_group olt_func_group[] = { + { + .name = "olt", + .regmap[0] = { + AIROHA_FUNC_MUX, + REG_GPIO_PON_MODE, + GPIO_OLT_MODE_MASK, + GPIO_OLT_MODE_MASK + }, + .regmap_size = 1, + }, +}; + static const struct airoha_pinctrl_func_group tod_1pps_func_group[] = { { .name = "pon_tod_1pps", @@ -1190,6 +1207,7 @@ static const struct airoha_pinctrl_func_group phy4_led1_func_group[] = { static const struct airoha_pinctrl_func pinctrl_funcs[] = { PINCTRL_FUNC_DESC("pon", pon), + PINCTRL_FUNC_DESC("olt", olt), PINCTRL_FUNC_DESC("tod_1pps", tod_1pps), PINCTRL_FUNC_DESC("sipo", sipo), PINCTRL_FUNC_DESC("mdio", mdio), -- 2.53.0