Re: [PATCH v5 0/2] PCI: mediatek-gen3: Add 2-lanes mode support + clock
Chen-Yu Tsai <[email protected]> Fri, 7 Aug 2026 11:24:09 +0800
| Newsgroups | org.infradead.lists.linux-mediatek,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci |
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| Message-ID | <CAGXv+5HrDw8GWb9zp1AaQU9UW+0FGcr7jOV2jt_zi_2KgfgBqA@mail.gmail.com> |
On Fri, Aug 7, 2026 at 12:53 AM Christian Marangi <[email protected]> wrote: > This small series introduce support for 2-lanes mode for Airoha AN7581 Just a nitpick, but I would probably name this something else, like "cross-controller lane-bonding mode" or "lane stealing"? PCIe already has 2x lanes as a standard feature, so this naming is a bit confusing. It's not like dual-LVDS display in which LVDS is only a single lane. ChenYu > SoC. This is needed for correctly functionality of Eagle WiFi Card > normally attached to this SoC that require a 2-line PCIe card to > correctly work (and give the proper performance) > > The first 2 patch address a limitation of the PCIe implementation > where the PERSTOUT reset were indirectly asserted and deasserted > all at the same time (for all the 3 PCIe card) with PCIe > enable and disable. > The 2 patch address this and introduce correct reset to control > reset line for the relevant PCIe line. > > The last 2 patch add additional logic and support to assert > and deassert the PERSTOUT and also apply the required configuration > for 2-lanes mode. > > 2-lanes mode is implemented in DT by adding the required property > and by defining the "num-lanes" to 2. > > Changes v5: > - Address formal comments from Bjorn > - Drop clk patch (handled in separate series) > - Add reference to clk changes > Changes v4: > - Improve DT split patch (drop unneeded property) > - Handle power_down PERSTOUT > Changes v3: > - Add Ack from Krzysztof > - Improve commit description of PCIe patch > - Use pcie->num_lanes instead of possible uninit variable num_lanes > Changes v2: > - Address typo regs -> reg in Documentation > - Address typo lan -> lane in Documentation > - Apply a suggested fix from Airoha for PCIe MUX configuration > before PHY init > - Parse secondary reg in probe > - Add missing reset_status handling for inverted bits > - Move SCU to local handling in power_up > - Add check for max num-lanes for EN7581 > > Christian Marangi (2): > dt-bindings: PCI: mediatek-gen3: Split Airoha schema and document > 2-lanes > PCI: mediatek-gen3: Add 2-lanes mode support for Airoha AN7581 > > .../bindings/pci/airoha,en7581-pcie.yaml | 244 ++++++++++++++++++ > .../bindings/pci/mediatek-pcie-gen3.yaml | 77 +----- > drivers/pci/controller/pcie-mediatek-gen3.c | 106 ++++++-- > 3 files changed, 338 insertions(+), 89 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pci/airoha,en7581-pcie.yaml > > -- > 2.53.0 > >