Re: [PATCH v2 0/3] mtd: rawnand: sunxi: fix H6/H616 controller timings
Miquel Raynal <[email protected]>
| Newsgroups | org.infradead.lists.linux-mtd,dev.linux.lists.linux-sunxi,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel,org.kernel.vger.stable |
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| Message-ID | <[email protected]> |
Hi James, On 17/07/2026 at 11:33:56 -06, James Hilliard <[email protected]> wrote: > The sunxi NAND timing solver currently applies the original A10 NDFC > timing characteristics to every supported controller. The H6/H616 NDFC > uses two internal cycles for several setup and hold intervals and has > different delay-field encodings, so the resulting clock and timing > register values do not match the hardware. > > Prepare for per-controller timing data in two behaviorally focused > patches, then add and select the H616 characteristics in the final fix. > Legacy controllers retain their existing setup-cycle behavior and delay > encodings. > > Tested on an H616 board with Toshiba TC58NVG1S3H NAND. > > Signed-off-by: James Hilliard <[email protected]> There are a number of checkpatch issue. Can you please fix them? (except the camelcase one which is fine with timing names coming from the ONFI spec). Thanks, Miquèl ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/