Re: (subset) [PATCH v8 0/6] Add QMP PCIe Multi-PHY support
Vinod Koul <[email protected]>
| Newsgroups | org.infradead.lists.linux-phy,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On Thu, 30 Jul 2026 22:13:49 -0700, Qiang Yu wrote:
> Some QMP PCIe PHY hardware blocks can be configured through a link-mode
> register into different link topologies, such as a single wide link, or
> multiple independent narrower links (e.g. x8 or x4+x4 mode on the Glymur
> PCIe3 PHY).
>
> Earlier revisions tried to extend the existing single-instance
> phy-qcom-qmp-pcie.c driver to cover this hardware. That added a large
> amount of conditional, multi-PHY logic to a driver whose data model
> assumes one PHY per node.
>
> [...]
Applied, thanks!
[1/6] dt-bindings: phy: qcom: Add Glymur QMP PCIe multiple link-mode PHY
commit: 5619458024925b3a488f9046b3ab26647582b99f
[2/6] phy: qcom: qmp-pcie: Add QMP PCIe Multi-PHY driver
commit: 1781be3c8a5ddf40f5f9e7b9dc32cc577d491062
Best regards,
--
~Vinod
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