Re: [PATCH 7/8] arm64: dts: st: Add USB nodes on stm32mp231

On 8/12/26 02:55, Marek Vasut wrote:
> Add USB controller and PHY nodes to stm32mp231 DT.
> This includes two USB 2.0 FEMTO PHYs, USB 2.0 host
> controller and DWC3 DRD controller nodes. Include
> missing COMBOPHY for the USB 3.0 controller.

Hi Marek,

There's no support for the combophy on STM32MP23.
It means USB3DR can be used in High Speed maximum.
Please check the datasheet.

> 
> Signed-off-by: Marek Vasut <[email protected]>
> Signed-off-by: Pankaj Dev <[email protected]>
> ---
> Cc: Alexandre Torgue <[email protected]>
> Cc: Christian Bruel <[email protected]>
> Cc: Conor Dooley <[email protected]>
> Cc: Fabrice Gasnier <[email protected]>
> Cc: Greg Kroah-Hartman <[email protected]>
> Cc: Krzysztof Kozlowski <[email protected]>
> Cc: Maxime Coquelin <[email protected]>
> Cc: Neil Armstrong <[email protected]>
> Cc: Pankaj Dev <[email protected]>
> Cc: Rahul Kumar <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Rosen Penev <[email protected]>
> Cc: Thinh Nguyen <[email protected]>
> Cc: Vinod Koul <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> ---
>  arch/arm64/boot/dts/st/stm32mp231.dtsi | 77 ++++++++++++++++++++++++++
>  1 file changed, 77 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/st/stm32mp231.dtsi
> index 4505fc0e3b537..b8cef81eceeb1 100644
> --- a/arch/arm64/boot/dts/st/stm32mp231.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi
> @@ -7,6 +7,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
>  #include <dt-bindings/reset/st,stm32mp25-rcc.h>
> +#include <dt-bindings/phy/phy.h>
>  
>  / {
>  	#address-cells = <2>;
> @@ -146,6 +147,26 @@ timer {
>  		always-on;
>  	};
>  
> +	usb2_phy1: usb2-phy1 {
> +		compatible = "st,stm32mp25-usb2phy1";
> +		#phy-cells = <0>;
> +		#clock-cells = <0>;
> +		st,syscfg = <&syscfg 0x2400>;
> +		clocks = <&rcc CK_KER_USB2PHY1>;
> +		resets = <&rcc USB2PHY1_R>;
> +		status = "disabled";
> +	};
> +
> +	usb2_phy2: usb2-phy2 {
> +		compatible = "st,stm32mp25-usb2phy2";
> +		#phy-cells = <0>;
> +		#clock-cells = <0>;
> +		st,syscfg = <&syscfg 0x2800>;
> +		clocks = <&rcc CK_KER_USB2PHY2EN>;
> +		resets = <&rcc USB2PHY2_R>;
> +		status = "disabled";
> +	};
> +
>  	soc@0 {
>  		compatible = "simple-bus";
>  		ranges = <0x0 0x0 0x0 0x80000000>;
> @@ -769,6 +790,21 @@ dcmipp: dcmipp@48030000 {
>  				status = "disabled";
>  			};
>  
> +			combophy: phy@480c0000 {
> +				compatible = "st,stm32mp25-combophy";
> +				reg = <0x480c0000 0x1000>;
> +				#phy-cells = <1>;
> +				clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
> +				clock-names = "apb", "ker";
> +				resets = <&rcc USB3PCIEPHY_R>;
> +				reset-names = "phy";
> +				access-controllers = <&rifsc 67>;
> +				power-domains = <&cluster_pd>;
> +				wakeup-source;
> +				interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
> +				status = "disabled";
> +			};
> +

Should get rid of combophy node.

>  			sdmmc1: mmc@48220000 {
>  				compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
>  				reg = <0x48220000 0x400>, <0x44230400 0x8>;
> @@ -862,6 +898,47 @@ stmmac_axi_config_1: stmmac-axi-config {
>  					snps,wr_osr_lmt = <0x7>;
>  				};
>  			};
> +
> +			usbh_ohci: usb@482e0000 {
> +				compatible = "generic-ohci";
> +				reg = <0x482e0000 0x1000>;
> +				access-controllers = <&rifsc 63>;
> +				clocks = <&usb2_phy1>, <&rcc CK_BUS_USB2OHCI>;
> +				interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
> +				phys = <&usb2_phy1>;
> +				phy-names = "usb";
> +				resets = <&rcc USBH_R>;
> +				status = "disabled";
> +			};
> +
> +			usbh_ehci: usb@482f0000 {
> +				compatible = "generic-ehci";
> +				reg = <0x482f0000 0x1000>;
> +				access-controllers = <&rifsc 63>;
> +				clocks = <&usb2_phy1>, <&rcc CK_BUS_USB2EHCI>;
> +				companion = <&usbh_ohci>;
> +				interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> +				phys = <&usb2_phy1>;
> +				phy-names = "usb";
> +				resets = <&rcc USBH_R>;
> +				status = "disabled";
> +			};
> +
> +			usb3dr: usb@48300000 {
> +				compatible = "st,stm32mp25-dwc3";
> +				reg = <0x48300000 0x100000>;
> +				access-controllers = <&rifsc 66>;
> +				clocks = <&rcc CK_KER_USB2PHY2>,
> +					 <&rcc CK_BUS_USB3DR>,
> +					 <&rcc CK_KER_USB2PHY2>;
> +				clock-names = "ref", "bus_early", "suspend";
> +				interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
> +				phys = <&usb2_phy2>, <&combophy PHY_TYPE_USB3>;
> +				phy-names = "usb2-phy", "usb3-phy";

Please update USB2.0 PHYs and speed:
				phys = <&usb2_phy2>;
				phy-names = "usb2-phy";
				maximum-speed = "high-speed";


> +				resets = <&rcc USB3DR_R>;
> +				st,syscfg = <&syscfg 0x4800>;
> +				status = "disabled";
> +			};
>  		};
>  
>  		bsec: efuse@44000000 {


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