Re: [PATCH v3 3/5] phy: qualcomm: qmp-combo: Add preliminary USB4 support
Konrad Dybcio <[email protected]>
| Newsgroups | org.infradead.lists.linux-phy,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On 8/7/26 2:48 PM, Manivannan Sadhasivam wrote: > On Thu, Jul 30, 2026 at 04:19:15PM +0200, Konrad Dybcio wrote: >> From: Konrad Dybcio <[email protected]> >> >> Some Combo PHYs (so far only on SC8280XP, X1E80100 and Glymur), come in >> a flavor called USB43DP, which as the name implies, features USB4, USB3 >> and DP signal processing capabilities. In that architecture, USB3 and >> USB4 PHYs share the same USB_PLL while featuring separate logic spaces. >> The DP part is roughly the same as on the instances without USB4. [...] >> +static int qmp_combo_reconfigure_phy(struct qmp_combo *qmp, enum qmpphy_mode new_mode) >> +{ >> + dev_dbg(qmp->dev, "qmp_combo_reconfigure_phy: switching from qmpphy mode %d to %d\n", >> + qmp->qmpphy_mode, new_mode); >> + > > Looks like a downstream debug leftover. No, that's an upstream debug non-leftover.. the downstream one was definitely not _dbg-suffixed This is present in the code before this patch, just in a different place > >> + if (qmp->usb_init_count || qmp->usb4phy_init_count) >> + qmp_combo_usb_power_off(qmp->usb_phy); >> + >> + if (qmp->dp_init_count) >> + writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); >> + >> + qmp_combo_com_exit(qmp, true); >> + > > No delay required between power off/on? Correct Konrad -- linux-phy mailing list [email protected] https://lists.infradead.org/mailman/listinfo/linux-phy