Re: [PATCH v3 03/17] riscv: kgdb: Use generated instruction headers

Nam Cao <[email protected]> Thu, 06 Aug 2026 09:09:50 +0200

Newsgroups	org.infradead.lists.linux-riscv,org.infradead.lists.kvm-riscv,org.kernel.vger.kvm,org.kernel.vger.linux-kernel,org.kernel.vger.linux-kselftest
Message-ID	<[email protected]>

Charlie Jenkins <[email protected]> writes:
> +#define riscv_insn_branch(_insn, regs_ptr, _opcode, _pc, _comparison, type)     \
> +	({                                                                      \
> +		unsigned long _ret;                                             \
> +		if ((type)riscv_insn_reg_get_val(                               \
> +			    regs_ptr,                                           \
> +			    riscv_insn_##_insn##_extract_xs1(_opcode))          \
> +			    _comparison(type) riscv_insn_reg_get_val(           \

That _comparison(type) looks like _comparison is a function and type is
its argument.

Can we change to
    _comparison (type)riscv_insn_reg_get_val(
to make it clearer?

>  		} else if (riscv_insn_is_c_beqz(op_code)) {
> -			rs1_num = decode_register_index_short(op_code,
> -							      RVC_C1_RS1_OPOFF);
> -			if (!rs1_num || regs_ptr[rs1_num] == 0)
> -				*next_addr = RVC_EXTRACT_BTYPE_IMM(op_code) + pc;
> +			rs1_num = riscv_insn_c_beqz_extract_xs1(op_code);
> +			if (regs_ptr[8 + rs1_num] == 0)
> +				*next_addr = riscv_insn_c_beqz_extract_imm(op_code) + pc;

Would it make sense to include the +8 part in riscv_insn_c_beqz_extract_xs1()?

Nam

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