[PATCH v9 04/20] dt-bindings: riscv: add Smcsrind and Sscsrind ISA extension descriptions
Atish Patra <[email protected]>
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From: Atish Patra <[email protected]> Add the S[m|s]csrind ISA extension description. Acked-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Atish Patra <[email protected]> Link: https://patch.msgid.link/[email protected] [[email protected]: use official extension names in the patch description] Signed-off-by: Paul Walmsley <[email protected]> --- Documentation/devicetree/bindings/riscv/extensions.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 5ffc40d599c0..ccff2be1224d 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -181,6 +181,14 @@ properties: changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: smcsrind + description: | + The standard Smcsrind machine-level extension extends the + indirect CSR access mechanism defined by the Smaia extension. This + extension allows other ISA extensions to use indirect CSR access + mechanism in M-mode as ratified in the 20240326 version of the + privileged ISA specification. + - const: smmpm description: | The standard Smmpm extension for M-mode pointer masking as @@ -226,6 +234,14 @@ properties: Profiles Version 1.0, with commit b1d806605f87 ("Updated to ratified state.") + - const: sscsrind + description: | + The standard Sscsrind supervisor-level extension extends the + indirect CSR access mechanism defined by the Ssaia extension. This + extension allows other ISA extensions to use indirect CSR access + mechanism in S-mode as ratified in the 20240326 version of the + privileged ISA specification. + - const: ssnpm description: | The standard Ssnpm extension for next-mode pointer masking as -- 2.53.0-Meta _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv