Re: [PATCH v2 2/3] dt-bindings: riscv: Add Worlds per-hart properties

Hi Krzysztof,

On Thu, Jul 30, 2026 at 09:30:24AM +0200, Krzysztof Kozlowski wrote:
> On Thu, Jul 30, 2026 at 12:39:07AM +0800, Yu-Chien Peter Lin wrote:
> > +  riscv,pmlwidlist:
> > +    $ref: /schemas/types.yaml#/definitions/uint64
> > +    description:
> > +      Optional bitmask of WIDs available for S-mode and U-mode use on this hart; each
> > +      set bit N indicates WID N is available. Firmware may read this to select platform
> > +      authorized WIDs for lower-privilege modes.
> >    # RISC-V has multiple properties for cache op block sizes as the sizes
> >    # differ between individual CBO extensions
> >    cache-op-block-size: false
> > diff --git a/Documentation/devicetree/bindings/riscv/worlds.yaml b/Documentation/devicetree/bindings/riscv/worlds.yaml
> > new file mode 100644
> > index 000000000000..cc8b3747591e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/riscv/worlds.yaml
> 
> Please run scripts/checkpatch.pl on the patches and fix reported
> warnings. After that, run also 'scripts/checkpatch.pl --strict' on the
> patches and (probably) fix more warnings. Some warnings can be ignored,
> especially from --strict run, but the code here looks like it needs a
> fix. Feel free to get in touch if the warning is not clear.

The only issue I got is:

WARNING: DT binding documents should be licensed (GPL-2.0-only OR BSD-2-Clause)
#114: FILE: Documentation/devicetree/bindings/riscv/worlds.yaml:1:
+# SPDX-License-Identifier: (GPL-2.0 OR MIT)

Hope I am not missing other warnings or errors.

Thanks,
Peter Lin

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