[PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently
Guo Ren <[email protected]>
| Newsgroups | org.infradead.lists.linux-riscv,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: "GUO Ren (XuanTie)" <[email protected]> This series removes the implicit assumption that RISC-V supports exactly eight IPI message types. Currently, the SBI, CLINT and ACLINT SSWI IPI providers use BITS_PER_BYTE when sizing the generic IPI mux, while IMSIC carries a separate IMSIC_NR_IPI definition set to 8. These values happen to match IPI_MAX today, but neither is the proper source of truth for the number of RISC-V IPI message types. Move enum ipi_message_type to asm/smp.h so IPI providers can use IPI_MAX directly, then replace the BITS_PER_BYTE and IMSIC_NR_IPI uses with IPI_MAX. This also makes adding future RISC-V IPI message types independent of the current eight-entry assumption. GUO Ren (XuanTie) (5): riscv: smp: Move enum ipi_message_type to asm/smp.h riscv: sbi: Use IPI_MAX for SBI IPI muxing clocksource: clint: Use IPI_MAX for IPI muxing irqchip/aclint-sswi: Use IPI_MAX for IPI muxing irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI arch/riscv/include/asm/smp.h | 12 ++++++++++++ arch/riscv/kernel/sbi-ipi.c | 4 ++-- arch/riscv/kernel/smp.c | 12 ------------ drivers/clocksource/timer-clint.c | 4 ++-- drivers/irqchip/irq-aclint-sswi.c | 4 ++-- drivers/irqchip/irq-riscv-imsic-early.c | 4 ++-- drivers/irqchip/irq-riscv-imsic-state.h | 1 - 7 files changed, 20 insertions(+), 21 deletions(-) -- 2.43.0 _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv