Re: [PATCH bpf-next 0/2] bpf, riscv: Add support for signed arena loads
Pu Lehui <[email protected]>
| Newsgroups | org.infradead.lists.linux-riscv,org.kernel.vger.bpf,org.kernel.vger.linux-kernel,org.kernel.vger.linux-kselftest |
|---|---|
| Message-ID | <[email protected]> |
On 2026/8/17 15:24, Chen Pei wrote: > Hi, > > Signed loads from arena memory are currently unsupported on riscv64: > bpf_jit_supports_insn() rejects BPF_MEMSX loads when in_arena is set, > so the verifier fails such programs with "sign extending loads from > arena are not supported yet". The x86 and arm64 JITs gained support > for them in v6.18 (a91ae3c89311, eab2a71f3a6a). Since compilers are > free to generate signed loads into arena memory (e.g. GCC-14 was > reported to do so), otherwise valid BPF programs fail to load on > riscv64. > > This series adds BPF_PROBE_MEM32SX support to the RV64 JIT and > enables the corresponding selftests on riscv64: > > 1 implements signed arena loads in the RV64 JIT. The verifier > already converts MEMSX loads from PTR_TO_ARENA to > BPF_PROBE_MEM32SX once bpf_jit_supports_insn() allows them, so > the JIT reuses the existing arena handling: the arena base > (RV_REG_ARENA) is added to the source register and the load is > emitted with sign extension (lb/lh/lw). BPF_PROBE_MEM32SX is also > added to the add_exception_handler() mode gate so faulting loads > register an exception table entry that clears the destination > register and resumes execution. > > 2 enables the arena LDSX tests on riscv64: JIT disassembly > assertions are added to arena_ldsx_disasm, and > arena_ldsx_exception/s8/s16/s32 are now run on riscv64. > > The series was verified on riscv64 with QEMU (-M virt -cpu max): all > five arena_ldsx tests pass, including the exception path (load from > unallocated arena memory returns 0) and the sign-extension values > (s8/s16/s32 tests return -1 as expected). > > Note: the __jited assertions in patch 2 were derived from the JIT > register allocation (R0->a5, R1->a0, R8->s3, R9->s4, arena base in > s7) and the emit_ldx() code paths; happy to adjust them if a > disassembler output detail differs. Test meets happy. For this series: Tested-by: Pu Lehui <[email protected]> > > Thanks, > Pei > > Chen Pei (2): > bpf, riscv: Add support for signed arena loads > selftests/bpf: Enable arena LDSX tests for riscv64 > > arch/riscv/net/bpf_jit_comp64.c | 15 +++++++++------ > .../testing/selftests/bpf/progs/verifier_ldsx.c | 17 +++++++++++++++++ > 2 files changed, 26 insertions(+), 6 deletions(-) > _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv