Re: [PATCH v4 02/21] iommufd: Add iommufd_sw_map_msi()
Jason Gunthorpe <[email protected]>
| Newsgroups | org.infradead.lists.linux-riscv,dev.linux.lists.iommu,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
On Wed, Aug 26, 2026 at 10:23:20AM +0200, Andrew Jones wrote: > RISC-V uses the same basic model as x86 (an IOMMU-owned interrupt > remapping IRQ domain). x86 makes that domain per-IOMMU because its IRTE > resources belong to the IOMMU instance. RISC-V makes it per-device because > its callbacks operate on the device's attached IOMMU domain and preserve > that device's existing MSI parent. The IRQ callbacks provide the lifecycle > hooks, even though the mappings, MSI table, and device context all remain > IOMMU state. The irq domain isn't per device, it is per msi table, many devices can share the same table, and the VM should have a single shared table across all devices. That's the core uniquely RISCV wrinkle I think. IDK how Thomas would like to model this, but you will get a better result if it is very clearly explained and asked. I would like to keep the iommu out of it, so I prefer if IRQ code patches in its MSI table pointer broadly the same way AMD does. Though AMD doesn't have the restriction that remapping only works with a S2 domain :( Jason _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv