Re: [PATCH v2 0/5] platform: generic: spacemit: add K3 platform support

On 8/18/26 03:14, Troy Mitchell wrote:
> Add initial OpenSBI platform support for the SpacemiT K3 SoC. K3 has
> 16 harts split across four clusters: eight X100 harts in C0/C1 and
> eight A100 harts in C2/C3.
> 
> The main upstream integration constraint is that K3 is heterogeneous at
> the ISA level. The CPU device tree used for testing exposes the same
> non-H standard extensions for X100 and A100. X100 additionally exposes H
> and the related Sha, Shcounterenw, Shgatpa, Shtvala, Shvsatpa,
> Shvstvala, and Shvstvecd extensions. X100 has a 256-bit VLEN, while
> A100 has a 1024-bit VLEN. A100 also implements the vendor-specific
> SpacemiT IME and FP8 AI extensions, which OpenSBI does not inspect or
> use.
> 
> At the base of this series, OpenSBI selects the expected-trap handler
> once from the cold-boot hart and reuses it globally. An X100 cold-boot
> hart would therefore make an A100 hart use the H-aware handler, which
> accesses mtval2 and mtinst even though A100 does not implement H. Select
> the handler from the current hart instead. An audit of the remaining
> extension-dependent paths found that ISA extensions and detected CSR
> features are stored per-hart, the generic FDT parser visits every hart,
> and vector code reads the current hart's VLENB. The K3 CPU device tree
> also exposes the same counter and timer extensions on both core types.
> No other cold-boot-hart-derived ISA selection was found.
> 
> K1 and K3 share vendor cache-control CSRs, PMU idle fields, cluster
> sizing, and the CCI-550 programming sequence, but their CCI topology,
> boot flow, and HSM support differ. Factor only the common definitions and
> CCI helper so K3 does not depend on K1 and the K1 encoded values and
> behavior remain unchanged. Run per-hart register setup from
> nascent_init() rather than the policy-only cold_boot_allowed() hook.
> 
> On K3, the cold-boot hart programs the four cluster warm-boot vectors,
> enables CCI snoop and DVM requests, prevents WFI from powering down cores
> or clusters, and wakes the secondary harts. A bounded wait prevents a
> non-responsive secondary hart from stalling boot indefinitely. Each hart
> programs its own PMA, cache, snooping, and prefetch state, with X100 harts
> also enabling H. The warm-boot entry establishes cache coherency before
> entering common code so secondary harts can observe state published by
> the cold-boot hart.
> 
> Runtime validation used the SpacemiT K3 SDK. The UART at 115200 baud
> showed OpenSBI and U-Boot starting successfully, followed by Linux
> bringing all 16 harts online. The series has also been build-tested with:
> 
>    - the generic default configuration
>    - a K1 configuration with K3 disabled and the SpacemiT HSM driver
>    - a K3 configuration with K1 and the SpacemiT HSM driver disabled
> 
> To reproduce the runtime test, build this OpenSBI tree at the address
> where the SDK loads it, then copy the resulting firmware into the SDK
> output directory:
> 
>    K3_SDK_DIR=/path/to/k3-sdk
>    make O=build-k3 CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic \
>         FW_TEXT_START=0x100000000
>    cp build-k3/platform/generic/firmware/fw_dynamic.bin \
>       "$K3_SDK_DIR/output/fw_dynamic.bin"
> 
> Before rebuilding U-Boot, update the UART0 node in the K3 board DT
> selected by SPL and passed to OpenSBI. The SDK describes it only as
> "ns16550", so upstream OpenSBI initializes it without UART_CAP_UUE and
> writes 0x00 to UART_IER. The K3 UART requires UART_IER_UUE (bit 6).
> Change the node in uboot-2022.10/arch/riscv/dts/k3.dtsi to:
> 
>    uart0: uart@d4017000 {
>            ...
>            compatible = "spacemit,k1-uart", "intel,xscale-uart",
>                         "ns16550";
>            ...
>    };
> 
> The compatible order is significant. Upstream OpenSBI skips the vendor
> string, then matches "intel,xscale-uart", which selects UART_CAP_UUE and
> writes 0x40 to UART_IER. The final "ns16550" remains a generic fallback.
> This is the DT used for the successful boot test.
> 
> With output/fw_dynamic.bin already present, rebuild U-Boot. The SDK
> preserves that OpenSBI binary and packages it with U-Boot:
> 
>    make -C "$K3_SDK_DIR" uboot

The SpacemiT firmware is developing fast. Please, indicate the exact 
version by commit hash and repo url for buildroot, U-Boot, esos, EDK II, 
Linux or any other repos that are needed for testing.

Best regards

Heirnich

> 
> This produces output/FSBL.bin and output/u-boot-opensbi.itb. Using the
> SDK-built output/Image.itb, enter BROM fastboot mode with FEL+RESET and
> stage all three images into RAM:
> 
>    fastboot stage "$K3_SDK_DIR/output/FSBL.bin"
>    fastboot continue
>    sleep 8
>    fastboot stage "$K3_SDK_DIR/output/u-boot-opensbi.itb"
>    fastboot continue
>    sleep 3
>    fastboot stage "$K3_SDK_DIR/output/Image.itb"
>    fastboot continue
> 
> Signed-off-by: Troy Mitchell <[email protected]>
> ---
> Changes in v2:
>    - correct the K3 PMACFG0 CSR number from 0xbc0 to 0x7de
>    - select the expected-trap handler per hart for heterogeneous H support
>    - move K1 and K3 per-hart setup out of cold_boot_allowed()
>    - split the generic and K1 fixes into standalone patches, growing the
>      series from three patches to five
>    - document X100/A100 ISA and VLEN differences and the homogeneous-core
>      audit
>    - document OpenSBI/U-Boot packaging, the UART compatible adjustment,
>      and the USB fastboot test procedure
>    - Link to v1: https://lore.kernel.org/r/[email protected]
> 
> ---
> Troy Mitchell (2):
>        lib: sbi: select expected trap handler per hart
>        platform: generic: spacemit: k1: move hart init to nascent hook
> 
> Xianbin Zhu (3):
>        platform: generic: spacemit: k1: rename cache flush operation
>        platform: generic: spacemit: k1: refactor platform support
>        platform: generic: spacemit: k3: add platform support
> 
>   include/sbi/sbi_csr_detect.h                 |   4 +-
>   include/sbi/sbi_hart.h                       |   2 +-
>   lib/sbi/sbi_hart.c                           |   9 +-
>   lib/sbi/sbi_illegal_atomic.c                 |   4 +-
>   lib/sbi/sbi_unpriv.c                         |   6 +-
>   lib/utils/hsm/fdt_hsm_spacemit.c             |   7 +-
>   platform/generic/Kconfig                     |   9 +
>   platform/generic/configs/defconfig           |   1 +
>   platform/generic/include/spacemit/common.h   |  88 +++++++++
>   platform/generic/include/spacemit/k1.h       |  96 ++--------
>   platform/generic/include/spacemit/k3.h       | 144 +++++++++++++++
>   platform/generic/include/spacemit/k3_asm.h   |  16 ++
>   platform/generic/include/spacemit/spacemit.h |  14 ++
>   platform/generic/spacemit/k1.c               |  45 ++---
>   platform/generic/spacemit/k3.c               | 266 +++++++++++++++++++++++++++
>   platform/generic/spacemit/k3_asm.S           |  33 ++++
>   platform/generic/spacemit/objects.mk         |   3 +
>   platform/generic/spacemit/spacemit.c         |  36 ++++
>   18 files changed, 661 insertions(+), 122 deletions(-)
> ---
> base-commit: c0f87f10d1bfb9e72a84ddfafb5604ee1bfe9d04
> change-id: 20260723-spacemit-k3-84720a7be53d
> 
> Best regards,
> --
> Troy Mitchell <[email protected]>
> 
> 


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