Re: [PATCH v6 2/3] lib: sbi: Add floating-point context save/restore support.

On Sun, May 17, 2026 at 3:51 AM <[email protected]> wrote:
>
> From: Dave Patel <[email protected]>
>
> Add support for saving and restoring RISC-V floating-point (F/D) extension
> state in OpenSBI. This introduces a floating-point context structure and
> helper routines to perform full context save and restore.
>
> The floating-point context includes storage for all 32 FPi registers (f0–f31)
> along with the fcsr control and status register. The register state is saved
> and restored using double-precision load/store instructions (fsd/fld), and
> single-precision load/store instructions (fsw/flw) on an RV64 system with
> F and D-extension support.
>
> The implementation follows an eager context switching model where the entire
> FP state is saved and restored on every context switch. This avoids the need
> for trap-based lazy management and keeps the design simple and deterministic.
>
> Signed-off-by: Dave Patel <[email protected]>"
> ---
>  include/sbi/sbi_fp.h |  26 ++++++
>  lib/sbi/objects.mk   |   1 +
>  lib/sbi/sbi_fp.c     | 215 +++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 242 insertions(+)
>  create mode 100644 include/sbi/sbi_fp.h
>  create mode 100644 lib/sbi/sbi_fp.c
>
> diff --git a/include/sbi/sbi_fp.h b/include/sbi/sbi_fp.h
> new file mode 100644
> index 00000000..a00756fc
> --- /dev/null
> +++ b/include/sbi/sbi_fp.h
> @@ -0,0 +1,26 @@
> +/*
> + * SPDX-License-Identifier: BSD-2-Clause
> + *
> + * Copyright (c) 2026 RISCstar Solutions.
> + *
> + * Authors:
> + *   Dave Patel <[email protected]>
> + */
> +#ifndef __SBI_FP_H__
> +#define __SBI_FP_H__
> +
> +#include <sbi/sbi_types.h>
> +
> +struct sbi_fp_context {
> +#if __riscv_d
> +       uint64_t f[32];
> +#else
> +       uint32_t f[32];
> +#endif
> +       unsigned long fcsr;
> +};
> +
> +void sbi_fp_save(struct sbi_fp_context *dst);
> +void sbi_fp_restore(const struct sbi_fp_context *src);
> +
> +#endif //__SBI_VECTOR_H__
> diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
> index ddb2e7ac..d8182383 100644
> --- a/lib/sbi/objects.mk
> +++ b/lib/sbi/objects.mk
> @@ -110,3 +110,4 @@ libsbi-objs-y += sbi_unpriv.o
>  libsbi-objs-y += sbi_expected_trap.o
>  libsbi-objs-y += sbi_cppc.o
>  libsbi-objs-y += sbi_vector.o
> +libsbi-objs-y += sbi_fp.o
> diff --git a/lib/sbi/sbi_fp.c b/lib/sbi/sbi_fp.c
> new file mode 100644
> index 00000000..96769bbc
> --- /dev/null
> +++ b/lib/sbi/sbi_fp.c
> @@ -0,0 +1,215 @@
> +/*
> + * SPDX-License-Identifier: BSD-2-Clause
> + *
> + * Copyright (c) 2026 RISCstar Solutions.
> + *
> + * Authors:
> + *   Dave Patel <[email protected]>
> + */
> +
> +#include <sbi/riscv_asm.h>
> +#include <sbi/riscv_encoding.h>
> +#include <sbi/sbi_fp.h>
> +
> +#if defined(__riscv_f) || defined(__riscv_d)
> +
> +static inline void set_fs(void)
> +{
> +       csr_set(CSR_MSTATUS, MSTATUS_FS);
> +}
> +
> +void sbi_fp_save(struct sbi_fp_context *dst)
> +{
> +       if (!dst)
> +               return;
> +
> +       unsigned long mstatus_orig;

Move all variable declarations at the start of function.

> +       /* Save original mstatus */
> +       asm volatile("csrr %0, mstatus" : "=r"(mstatus_orig));
> +
> +       set_fs();

These two lines can be just one once CSR operation:
mstatus_orig = csr_read_set(CSR_MSTATUS, MSTATUS_FS);

> +
> +#if defined(__riscv_d)
> +       asm volatile(
> +               "fsd f0,  0(%0)\n"
> +               "fsd f1,  8(%0)\n"
> +               "fsd f2,  16(%0)\n"
> +               "fsd f3,  24(%0)\n"
> +               "fsd f4,  32(%0)\n"
> +               "fsd f5,  40(%0)\n"
> +               "fsd f6,  48(%0)\n"
> +               "fsd f7,  56(%0)\n"
> +               "fsd f8,  64(%0)\n"
> +               "fsd f9,  72(%0)\n"
> +               "fsd f10, 80(%0)\n"
> +               "fsd f11, 88(%0)\n"
> +               "fsd f12, 96(%0)\n"
> +               "fsd f13, 104(%0)\n"
> +               "fsd f14, 112(%0)\n"
> +               "fsd f15, 120(%0)\n"
> +               "fsd f16, 128(%0)\n"
> +               "fsd f17, 136(%0)\n"
> +               "fsd f18, 144(%0)\n"
> +               "fsd f19, 152(%0)\n"
> +               "fsd f20, 160(%0)\n"
> +               "fsd f21, 168(%0)\n"
> +               "fsd f22, 176(%0)\n"
> +               "fsd f23, 184(%0)\n"
> +               "fsd f24, 192(%0)\n"
> +               "fsd f25, 200(%0)\n"
> +               "fsd f26, 208(%0)\n"
> +               "fsd f27, 216(%0)\n"
> +               "fsd f28, 224(%0)\n"
> +               "fsd f29, 232(%0)\n"
> +               "fsd f30, 240(%0)\n"
> +               "fsd f31, 248(%0)\n"
> +               :
> +               : "r"(dst->f)
> +               : "memory"
> +       );
> +#else
> +       asm volatile(
> +               "fsw f0,  0(%0)\n"
> +               "fsw f1,  4(%0)\n"
> +               "fsw f2,  8(%0)\n"
> +               "fsw f3,  12(%0)\n"
> +               "fsw f4,  16(%0)\n"
> +               "fsw f5,  20(%0)\n"
> +               "fsw f6,  24(%0)\n"
> +               "fsw f7,  28(%0)\n"
> +               "fsw f8,  32(%0)\n"
> +               "fsw f9,  36(%0)\n"
> +               "fsw f10, 40(%0)\n"
> +               "fsw f11, 44(%0)\n"
> +               "fsw f12, 48(%0)\n"
> +               "fsw f13, 52(%0)\n"
> +               "fsw f14, 56(%0)\n"
> +               "fsw f15, 60(%0)\n"
> +               "fsw f16, 64(%0)\n"
> +               "fsw f17, 68(%0)\n"
> +               "fsw f18, 72(%0)\n"
> +               "fsw f19, 76(%0)\n"
> +               "fsw f20, 80(%0)\n"
> +               "fsw f21, 84(%0)\n"
> +               "fsw f22, 88(%0)\n"
> +               "fsw f23, 92(%0)\n"
> +               "fsw f24, 96(%0)\n"
> +               "fsw f25, 100(%0)\n"
> +               "fsw f26, 104(%0)\n"
> +               "fsw f27, 108(%0)\n"
> +               "fsw f28, 112(%0)\n"
> +               "fsw f29, 116(%0)\n"
> +               "fsw f30, 120(%0)\n"
> +               "fsw f31, 124(%0)\n"
> +               :
> +               : "r"(dst->f)
> +               : "memory"
> +       );
> +#endif //__riscv_d
> +
> +       dst->fcsr = csr_read(CSR_FCSR);
> +
> +       /* Restore original mstatus LAST */
> +       asm volatile("csrw mstatus, %0" :: "r"(mstatus_orig));

csr_write(CSR_MSTATUS, mstatus_orig);

> +}
> +
> +void sbi_fp_restore(const struct sbi_fp_context *src)
> +{
> +       if (!src)
> +               return;
> +
> +       unsigned long mstatus_orig;

Move all variable declarations at the start of function.

> +       /* Save original mstatus */
> +       asm volatile("csrr %0, mstatus" : "=r"(mstatus_orig));
> +
> +       set_fs();

Same comment as above.

> +
> +#if defined(__riscv_d)
> +       asm volatile(
> +               "fld f0,  0(%0)\n"
> +               "fld f1,  8(%0)\n"
> +               "fld f2,  16(%0)\n"
> +               "fld f3,  24(%0)\n"
> +               "fld f4,  32(%0)\n"
> +               "fld f5,  40(%0)\n"
> +               "fld f6,  48(%0)\n"
> +               "fld f7,  56(%0)\n"
> +               "fld f8,  64(%0)\n"
> +               "fld f9,  72(%0)\n"
> +               "fld f10, 80(%0)\n"
> +               "fld f11, 88(%0)\n"
> +               "fld f12, 96(%0)\n"
> +               "fld f13, 104(%0)\n"
> +               "fld f14, 112(%0)\n"
> +               "fld f15, 120(%0)\n"
> +               "fld f16, 128(%0)\n"
> +               "fld f17, 136(%0)\n"
> +               "fld f18, 144(%0)\n"
> +               "fld f19, 152(%0)\n"
> +               "fld f20, 160(%0)\n"
> +               "fld f21, 168(%0)\n"
> +               "fld f22, 176(%0)\n"
> +               "fld f23, 184(%0)\n"
> +               "fld f24, 192(%0)\n"
> +               "fld f25, 200(%0)\n"
> +               "fld f26, 208(%0)\n"
> +               "fld f27, 216(%0)\n"
> +               "fld f28, 224(%0)\n"
> +               "fld f29, 232(%0)\n"
> +               "fld f30, 240(%0)\n"
> +               "fld f31, 248(%0)\n"
> +               :
> +               : "r"(src->f)
> +               : "memory"
> +       );
> +#else
> +
> +       asm volatile(
> +               "flw f0,   0(%0)\n"
> +               "flw f1,   4(%0)\n"
> +               "flw f2,   8(%0)\n"
> +               "flw f3,  12(%0)\n"
> +               "flw f4,  16(%0)\n"
> +               "flw f5,  20(%0)\n"
> +               "flw f6,  24(%0)\n"
> +               "flw f7,  28(%0)\n"
> +               "flw f8,  32(%0)\n"
> +               "flw f9,  36(%0)\n"
> +               "flw f10, 40(%0)\n"
> +               "flw f11, 44(%0)\n"
> +               "flw f12, 48(%0)\n"
> +               "flw f13, 52(%0)\n"
> +               "flw f14, 56(%0)\n"
> +               "flw f15, 60(%0)\n"
> +               "flw f16, 64(%0)\n"
> +               "flw f17, 68(%0)\n"
> +               "flw f18, 72(%0)\n"
> +               "flw f19, 76(%0)\n"
> +               "flw f20, 80(%0)\n"
> +               "flw f21, 84(%0)\n"
> +               "flw f22, 88(%0)\n"
> +               "flw f23, 92(%0)\n"
> +               "flw f24, 96(%0)\n"
> +               "flw f25, 100(%0)\n"
> +               "flw f26, 104(%0)\n"
> +               "flw f27, 108(%0)\n"
> +               "flw f28, 112(%0)\n"
> +               "flw f29, 116(%0)\n"
> +               "flw f30, 120(%0)\n"
> +               "flw f31, 124(%0)\n"
> +               :
> +               : "r"(src->f)
> +               : "memory"
> +       );
> +
> +#endif
> +
> +       csr_write(CSR_FCSR, src->fcsr);
> +
> +       /* Restore original mstatus LAST */
> +       asm volatile("csrw mstatus, %0" :: "r"(mstatus_orig));

Same comment as above.

> +}
> +#else
> +void sbi_fp_save(struct sbi_fp_context *dst) {}
> +void sbi_fp_restore(const struct sbi_fp_context *src) {}
> +#endif // FP present
> --
> 2.43.0
>
>
> --
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Regards,
Anup

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