[PATCH v2 0/2] Fix eic770x warm reset

Bo Gan <[email protected]> Fri, 5 Jun 2026 00:57:06 -0700

Newsgroups	org.infradead.lists.opensbi
Message-ID	<[email protected]>

Use the CEASE instruction as documented in the SoC datasheet to fix
the warm reset issue observed on my EIC7700/Hifive P550. Refer to
PATCH 2/2 for a more detailed description.

Signed-off-by: Bo Gan <[email protected]>
---
Changes in v2:
 - Clear the disableDCacheClockGate bit in EIC770X_CSR_FEAT0
   See more detailed comments in function eic770x_hart_stop

---
Bo Gan (2):
  include: utils/hsm: Add __noreturn attribute for sifive_cease
  platform: generic: eswin: Add eic770x_hsm and fix warm reset issues

 include/sbi_utils/hsm/fdt_hsm_sifive_inst.h |   3 +-
 platform/generic/eswin/eic770x.c            | 118 ++++++++++++++++++--
 platform/generic/eswin/hfp.c                |   4 +-
 platform/generic/include/eswin/eic770x.h    |  20 +++-
 4 files changed, 128 insertions(+), 17 deletions(-)

-- 
2.34.1


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