Re: [patch 4/8] MDS basics 4

On Tue, 19 Feb 2019, speck for Thomas Gleixner wrote:

> On Tue, 19 Feb 2019, speck for Andrew Cooper wrote:
> 
> > On 19/02/2019 12:44, speck for Thomas Gleixner wrote:
> > > Subject: [patch 4/8] x86/speculation/mds: Conditionaly clear CPU buffers on idle entry
> > > From: Thomas Gleixner <[email protected]>
> > >
> > > Add a static key which controls the invocation of the CPU buffer clear
> > > mechanism on idle entry. This is independent of other MDS mitigations
> > > because the idle entry invocation to mitigate the potential leakage due to
> > > store buffer repartitioning is only necessary on SMT systems.
> > >
> > > Add the actual invocations to the different halt/mwait variants which
> > > covers all usage sites. mwaitx is not patched as it's not available on
> > > Intel CPUs.
> > >
> > > Signed-off-by: Thomas Gleixner <[email protected]>
> > 
> > Unfortunately, clearing is needed on the exit from idle as well as the
> > entry.
> > 
> > This only impacts the store buffer (MSBDS, previously PSF) because it
> > gets statically re-partitioned when a thread comes in and out of idle.
> > 
> > >From the point of view of the thread going idle, when going idle my half
> > of the store buffers get given to the other thread and potentially leak
> > my secrets, whereas when coming out of idle, the other threads store
> > buffers get split with me, potentially leaking their secrets.
> 
> Duh, indeed. Easy enough to fix.

I take that back. It's a pointless excercise. Either the flush happens on
exit to user or on vmenter. Up to there nothing to worry about. If we have
to worry about the kernel being the malicious entity, we have other
problems.

Thanks,

	tglx