Re: [patch 4/8] MDS basics 4
Thomas Gleixner <[email protected]>
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <[email protected]> |
On Tue, 19 Feb 2019, speck for Thomas Gleixner wrote: > On Tue, 19 Feb 2019, speck for Andrew Cooper wrote: > > > On 19/02/2019 12:44, speck for Thomas Gleixner wrote: > > > Subject: [patch 4/8] x86/speculation/mds: Conditionaly clear CPU buffers on idle entry > > > From: Thomas Gleixner <[email protected]> > > > > > > Add a static key which controls the invocation of the CPU buffer clear > > > mechanism on idle entry. This is independent of other MDS mitigations > > > because the idle entry invocation to mitigate the potential leakage due to > > > store buffer repartitioning is only necessary on SMT systems. > > > > > > Add the actual invocations to the different halt/mwait variants which > > > covers all usage sites. mwaitx is not patched as it's not available on > > > Intel CPUs. > > > > > > Signed-off-by: Thomas Gleixner <[email protected]> > > > > Unfortunately, clearing is needed on the exit from idle as well as the > > entry. > > > > This only impacts the store buffer (MSBDS, previously PSF) because it > > gets statically re-partitioned when a thread comes in and out of idle. > > > > >From the point of view of the thread going idle, when going idle my half > > of the store buffers get given to the other thread and potentially leak > > my secrets, whereas when coming out of idle, the other threads store > > buffers get split with me, potentially leaking their secrets. > > Duh, indeed. Easy enough to fix. Delta patch below. Stupid me even mentioned the repartioning on both sides in the changelog. Thanks, tglx 8<------------------ --- a/arch/x86/include/asm/irqflags.h +++ b/arch/x86/include/asm/irqflags.h @@ -58,12 +58,14 @@ static inline __cpuidle void native_safe { mds_clear_cpu_buffers(&idle_mds_clear_cpu_buffers); asm volatile("sti; hlt": : :"memory"); + mds_clear_cpu_buffers(&idle_mds_clear_cpu_buffers); } static inline __cpuidle void native_halt(void) { mds_clear_cpu_buffers(&idle_mds_clear_cpu_buffers); asm volatile("hlt": : :"memory"); + mds_clear_cpu_buffers(&idle_mds_clear_cpu_buffers); } #endif --- a/arch/x86/include/asm/mwait.h +++ b/arch/x86/include/asm/mwait.h @@ -46,6 +46,8 @@ static inline void __mwait(unsigned long /* "mwait %eax, %ecx;" */ asm volatile(".byte 0x0f, 0x01, 0xc9;" :: "a" (eax), "c" (ecx)); + + mds_clear_cpu_buffers(&idle_mds_clear_cpu_buffers); } /*