[MODERATED] Re: [patch V5 09/14] MDS basics 9
Josh Poimboeuf <[email protected]>
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <20190301140415.pjv7qjellvqrlbw5@treble> |
On Wed, Feb 27, 2019 at 04:09:48PM +0100, speck for Thomas Gleixner wrote: > Subject: [patch V5 09/14] x86/speculation/mds: Conditionally clear CPU buffers on idle entry > From: Thomas Gleixner <[email protected]> > > Add a static key which controls the invocation of the CPU buffer clear > mechanism on idle entry. This is independent of other MDS mitigations > because the idle entry invocation to mitigate the potential leakage due to > store buffer repartitioning is only necessary on SMT systems. > > Add the actual invocations to the different halt/mwait variants which > covers all usage sites. mwaitx is not patched as it's not available on > Intel CPUs. > > The buffer clear is only invoked before entering the C-State to prevent > that stale data from the idling CPU is spilled to the Hyper-Thread sibling > after the Store buffer got repartitioned and all entries are available to > the non idle sibling. Andrea brought up a good question privately -- this patch mitigates MSBDS for HT, but HT will still be susceptible to the other two MDS issues. So what's the point? It seems this patch only protects people who don't care about MDS in the first place. -- Josh