[MODERATED] Re: [PATCH v4 06/10] TAAv4 6

On Wed, Sep 25, 2019 at 05:10:54PM -0400, speck for Kanth Ghatraju wrote:
> 
> 
> > On Sep 3, 2019, at 5:16 PM, speck for Pawan Gupta <[email protected]> wrote:
> > 
> > From: Pawan Gupta <[email protected]>
> > Subject: [PATCH v4 06/10] x86/speculation/taa: Add mitigation for TSX Async
> > Abort
> > 
> > TSX Async Abort (TAA) is a side channel attack on internal buffers in
> > some Intel processors similar to Microachitectural Data Sampling (MDS).
> > In this case certain loads may speculatively pass invalid data to
> > dependent operations when an asynchronous abort condition is pending in
> > a TSX transaction.  This includes loads with no fault or assist
> > condition.  Such loads may speculatively expose stale data from the
> > uarch data structures as in MDS.  Scope of exposure is within the
> > same-thread and cross-thread.  This issue affects all current processors
> > that support TSX.
> > 
> > On CPUs which have their IA32_ARCH_CAPABILITIES MSR bit MDS_NO=0 and the
> > MDS mitigation is clearing the CPU buffers using VERW, there is no
> > additional mitigation needed for TAA.
> Could you please explicitly state that for the processors that enumerate MD_CLEAR and using the VERW instruction or L1D_FLUSH command to mitigate MDS, no additional mitigation is required. Thanks.

L1D_FLUSH also clears the TAA affected CPU buffers, I will add this.

Thanks,
Pawan