[MODERATED] Re: [PATCH v5 1/8] NX 1
Ben Hutchings <[email protected]>
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <[email protected]> |
On Mon, 2019-07-01 at 15:52 +0200, speck for Paolo Bonzini wrote: > From: Pawan Gupta <[email protected]> > Subject: [PATCH 1/8] x86: Add ITLB_MULTIHIT bug infrastructure [...] > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -385,5 +385,6 @@ > #define X86_BUG_L1TF X86_BUG(18) /* CPU is affected by L1 Terminal Fault */ > #define X86_BUG_MDS X86_BUG(19) /* CPU is affected by Microarchitectural data sampling */ > #define X86_BUG_MSBDS_ONLY X86_BUG(20) /* CPU is only affected by the MSDBS variant of BUG_MDS */ > +#define X86_BUG_ITLB_MULTIHIT X86_BUG(21) /* CPU may incur MCE during certain page attribute changes */ [...] So this is now going to need to be renumbered after X86_BUG_SWAPGS. But the TAA series also allocates the next bug flag here. Then in other places there are textual conflicts between the two series due to insertions in the same place. I believe both of the issues these are addressing have the same embargo date, so it would be helpful to backporters if you could decide which fix belongs first, even if they continue to be developed as separate branches for now. (So far I've found it easier to apply NX before TAA.) Ben. -- Ben Hutchings Humans are not rational beings; they are rationalising beings.
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