[MODERATED] Re: [PATCH v7 00/10] TAAv7 0

On Wed, Oct 23, 2019 at 03:12:14PM -0700, speck for Pawan Gupta wrote:
> Below are the CPUs with MDS_NO=1.
> +----------------------------+------------------+------------+
> |            Name            |  Family / model  |  Stepping  |
> +============================+==================+============+
> | Whiskey Lake (ULT refresh) |      06_8E       |    0xC     |
> +----------------------------+------------------+------------+
> |    2nd gen Cascade Lake    |      06_55       |    6, 7    |

Ok, found one of this type:

vendor_id       : GenuineIntel
cpu family      : 6
model           : 85
model name      : Intel(R) Xeon(R) Platinum 8260L CPU @ 2.40GHz
stepping        : 6

microcode got updated to:

[    0.000000] microcode: microcode updated early to revision 0x400002c, date = 2019-09-05

and ARCH_CAP MSR is:

MSR_0x10A = 0xab = 1010_1011

Booting with CONFIG_X86_INTEL_TSX_MODE_OFF=y gives:

[    0.316520] Spectre V1 : Mitigation: usercopy/swapgs barriers and __user pointer sanitization
[    0.316522] Spectre V2 : Mitigation: Enhanced IBRS
[    0.316523] Spectre V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch
[    0.316525] Spectre V2 : mitigation: Enabling conditional Indirect Branch Prediction Barrier
[    0.316527] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl and seccomp
[    0.316528] TAA: Mitigation: TSX disabled

Booting with tsx=on gives

[    0.314958] TAA: Mitigation: Clear CPU buffers

and with

tsx=on tsx_async_abort=full,nosmt

[    0.315439] SMT: disabled
[    0.315440] TAA: Mitigation: Clear CPU buffers

I think we're good to go...

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg
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