[MODERATED] Re: [PATCH v5 08/11] TAAv5 8

On Wed, 16 Oct 2019, speck for Jiri Kosina wrote:

> But then we're not defaulting to safe behavior, which is confusing too, 
> because we almost (SMT being the exception) always did in the past for all 
> the other previous issues.
> 
> So I believe the above is the best compromise between having as few 
> regressions as possible, while still maintaining security (by default).
> 
> I agree it's not nice, but nothing is, if you ask me.

But again, given Pawan's (surprising to me, I'd still like to find this 
detail documented somewhere in Intel's materials) statement that there 
will never be a situation when some older CPU with MDS_NO will see 
ARCH_CAP_TSX_CTRL_MSR exposed by new ucode, I see this as much less 
pressing issue, and we could get away with tsx=off, as the number 
immediate regressions will be minimal.

And there will be enough time to push the information (need for 
commandline option) to the TSX users for the future CPUs.

Thanks,

-- 
Jiri Kosina
SUSE Labs