[MODERATED] Re: [PATCH v6 2/5] NX 2
Tyler Hicks <[email protected]>
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <20191015193754.GB31070@elm> |
On 2019-10-11 12:40:13, speck for Paolo Bonzini wrote:
>
> This patch adds new cpu family ATOM_TREMONT_X to the cpu vunerability
> whitelist. ATOM_TREMONT_X is not affected by X86_BUG_ITLB_MULTIHIT. There
> may be more bugs not affecting ATOM_TREMONT_X which are not known at
> this point and could be added later.
Please run s/TREMONT_X/TREMONT_D/ across the patch description to match
the code after commit 5ebb34edbefa ("x86/intel: Aggregate microserver
naming").
Tyler
>
> Signed-off-by: Pawan Gupta <[email protected]>
> Signed-off-by: Paolo Bonzini <[email protected]>
> ---
> arch/x86/kernel/cpu/common.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index fc00b2349a9f..c652ca9dc046 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1074,6 +1074,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
> * good enough for our purposes.
> */
>
> + VULNWL_INTEL(ATOM_TREMONT_D, NO_ITLB_MULTIHIT),
> +
> /* AMD Family 0xf - 0x12 */
> VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
> VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
> --
> 1.8.3.1