[MODERATED] Re: ***UNCHECKED*** Re: [PATCH v7 03/10] TAAv7 3

On Tue 22-10-19 09:48:01, speck for Pawan Gupta wrote:
> On Tue, Oct 22, 2019 at 09:42:26AM -0500, speck for Josh Poimboeuf wrote:
> > On Tue, Oct 22, 2019 at 10:15:34AM +0200, speck for Michal Hocko wrote:
> > > On Mon 21-10-19 13:25:02, speck for Pawan Gupta wrote:
> > > [...]
> > > > +	tsx=		[X86] Control Transactional Synchronization
> > > > +			Extensions (TSX) feature in Intel processors that
> > > > +			support TSX control.
> > > > +
> > > > +			This parameter controls the TSX feature. The options are:
> > > > +
> > > > +			on	- Enable TSX on the system.
> > > > +			off	- Disable TSX on the system.
> > > 
> > > Please explicitly mention that off is active only if TSX there is ucode
> > > support for that (aka MSR_IA32_TSX_CTRL).
> > 
> > I'm pretty sure I already asked for this in the last revision.  And this
> > is not the first time I've seen ignored feedback.  Pawan, please try to
> > take all feedback into account so we don't have to keep repeating
> > ourselves.
> 
> I am sorry to have missed it. All of the operation on|off|auto are
> dependent on TSX control being present. The tsx= description states that
> processors need TSX control support. I would extend it to specifically
> say ucode update adds TSX control support (aka MSR_IA32_TSX_CTRL).

Thanks! An explicit note about the MSR is important because that is
something people can google for.
 
> 
> 	tsx=		[X86] Control Transactional Synchronization
> 			Extensions (TSX) feature in Intel processors that
> 			support TSX control.
-- 
Michal Hocko
SUSE Labs