[MODERATED] Re: [PATCH v5 03/11] TAAv5 3
Pawan Gupta <[email protected]> Mon, 7 Oct 2019 10:50:32 -0700
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <[email protected]> |
> > +void tsx_init(struct cpuinfo_x86 *c)
> > +{
> > + if (!tsx_ctrl_is_supported())
> > + return;
> > +
> > + /*
> > + * Default to TSX_CTRL_DISABLE. This is because on certain processors
> > + * TSX may be used as part of a speculative side channel attack.
> > + */
> > + tsx_ctrl_state = TSX_CTRL_DISABLE;
> > +
> > + tsx_disable();
> > + /*
> > + * tsx_disable() will change the state of the
> > + * RTM CPUID bit. Clear it here since it is now
> > + * expected to be not set.
> > + */
> > + clear_cpu_cap(c, X86_FEATURE_RTM);
> > + setup_clear_cpu_cap(X86_FEATURE_RTM);
>
> You shouldn't be doing both clear_cpu_cap *and* setup_clear_cpu_cap().
>
> Also, please fold patch 4 into this patch or at least make the contents
> of tsx_init() in this patch make some sense.
I will fold patch 4 into this.
Thanks,
Pawan