[MODERATED] Re: ***UNCHECKED*** Re: [PATCH v5 08/11] TAAv5 8
Jiri Kosina <[email protected]> Tue, 15 Oct 2019 22:15:39 +0200 (CEST)
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <[email protected]> |
On Tue, 15 Oct 2019, speck for Josh Poimboeuf wrote: > Maybe I'm missing something. Isn't there going to be a ucode update for > MDS_NO parts, which does the verw buffer clearing? In that case there's > no need to disable TSX, and instead the verw mitigation could be used, > if desired. My understanding was that MDS_NO CPUs will only get ucode update that exposes TSX control MSR, and nothing else. > AFAICT, the patch allows to set the default to tsx=auto, which disables > TSX on *all* vulnerable parts, not just the MDS_NO ones. I don't see > how that would prevent user regressions. > > It sounds like maybe you're suggesting something else, that TSX should > only be disabled on vulnerable MDS_NO parts? OK, let me take a look at the code again. I definitely thought that's what 'auto' indeed does. -- Jiri Kosina SUSE Labs