[MODERATED] Re: LVI

On Tue, Nov 19, 2019 at 05:51:40PM +0000, speck for Andrew Cooper wrote:
> On 19/11/2019 17:40, speck for Josh Poimboeuf wrote:
> > Hi,
> >
> > What kernel changes (if any) are needed for LVI?  I haven't seen any
> > discussion here.
> 
> I have similar questions when it comes to virt.  For one, EPT A/D bits
> undermine any action the guest kernel takes to protect itself.
> 
> Given various pieces of academic literature on gaming the paging-out
> algorithm, I'm not inclined to take the bet that an attacker couldn't
> control EPT A/D bits to their advantage.

Hm, so IIUC, that would open up every load in the guest to a potential
attack, if it has gadgets after it?  That does sound bad...

If the A/D bit control is feasible then it sounds like we'd need an
L1TF-like flushing mitigation after vmexit?  That would protect the host
kernel too.

For L1TF-affected systems would it be feasible to move the vmenter
flushing to vmexit?  Or would we need both?

-- 
Josh