Re: [PATCH 3/4] V7 more sampling fun 3

Thomas Gleixner <[email protected]> Wed, 15 Apr 2020 14:58:40 +0200

Newsgroups	org.kernel.lore.historical-speck
Message-ID	<[email protected]>

Mark,

speck for mark gross <[email protected]> writes:
> On Tue, Apr 14, 2020 at 03:05:44PM -0500, speck for Josh Poimboeuf wrote:
>> On Thu, Jan 16, 2020 at 02:16:07PM -0800, speck for mark gross wrote:
>> > +static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
>> > +	VULNBL_INTEL_STEPPING(KABYLAKE_L,	X86_STEPPINGS(0, 0xA),		SRBDS),
>> > +	VULNBL_INTEL_STEPPING(KABYLAKE_L,	X86_STEPPINGS(0xB, 0xC),	SRBDS_IF_TSX),
>> > +	VULNBL_INTEL_STEPPING(KABYLAKE,		X86_STEPPINGS(0, 0xB),		SRBDS),
>> > +	VULNBL_INTEL_STEPPING(KABYLAKE,		X86_STEPPINGS(0xC, 0xD),	SRBDS_IF_TSX),
>> 
>> Another readability tweak: "0x0" helps with vertical alignment:
>> 
>> 	VULNBL_INTEL_STEPPING(KABYLAKE_L,	X86_STEPPINGS(0x0, 0xA),	SRBDS),
>> 	VULNBL_INTEL_STEPPING(KABYLAKE_L,	X86_STEPPINGS(0xB, 0xC),	SRBDS_IF_TSX),
>> 	VULNBL_INTEL_STEPPING(KABYLAKE,		X86_STEPPINGS(0x0, 0xB),	SRBDS),
>> 	VULNBL_INTEL_STEPPING(KABYLAKE,		X86_STEPPINGS(0xC, 0xD),	SRBDS_IF_TSX),
>
> FWIW the white paper no longer calls out individual steppings as vulnerable
> only if TSX so I'm losing the SRBDS_IF_TSX stuff.

So we lose the complete TSX conditionals or do they now apply to all
NO_MDS CPUs?

Thanks,

        tglx