[MODERATED] Re: Re: [PATCH 4/4] V8 more sampling fun 4
mark gross <[email protected]> Thu, 16 Apr 2020 15:57:56 -0700
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <20200416225756.GE2583@u1904> |
On Thu, Apr 16, 2020 at 07:49:14PM +0200, speck for Borislav Petkov wrote: > On Thu, Apr 16, 2020 at 12:20:21PM -0500, speck for Josh Poimboeuf wrote: > > On Thu, Jan 30, 2020 at 11:12:02AM -0800, speck for mark gross wrote: > > > +The possible values contained in this file are: > > > + > > > + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D > > > + Not affected Processor not vulnerable > > > + Vulnerable Processor vulnerable and mitigation di= sabled > > > + Vulnerable: No microcode Processor vulnerable and microcode is = missing > > > + mitigation > > > + Mitigated: Microcode Processor is vulnerable and mitigation= is in > > > + effect. > > > + Not affected (TSX disabled) Processor is only vulnerable when TSX = is > > > + enabled while this system was booted w= ith TSX > > > + disabled. > > > + Unknown Running on virtual guest processor tha= t is > > > + affected but with no way to know if ho= st > > > + processor is mitigated or vulnerable. > > > + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D > >=20 > > This doesn't match the code. >=20 > How's that? >=20 > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > Not affected Processor not vulnerable > Vulnerable Processor vulnerable and mitigation disabled > Vulnerable: No microcode Processor vulnerable and microcode is missi= ng > mitigation > Mitigation: Microcode Processor is vulnerable and mitigation is in > effect. > Mitigation: TSX disabled Processor is only vulnerable when TSX is > enabled while this system was booted with T= SX > disabled. > Unknown: Dependent on > hypervisor status Running on virtual guest processor that is > affected but with no way to know if host > processor is mitigated or vulnerable. > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >=20 thanks, --mark --=20 > Regards/Gruss, > Boris. >=20 > SUSE Software Solutions Germany GmbH, GF: Felix Imend=C3=B6rffer, HRB 36809= , AG N=C3=BCrnberg > --=20