Re: [RFC PATCH v1] Chapter 3: Add shared L1 Cache

Rob Herring <[email protected]>
Newsgroups org.kernel.vger.devicetree-spec
Message-ID <CAL_JsqKLJ=i7cbpYa-qfr+TQ+Z7HCq1iLoCiw+QcAGRaF_uZ5w@mail.gmail.com> 
On Mon, Feb 3, 2025 at 6:05 AM Alireza Sanaee <[email protected]> wrote:
>
> For L1 cache to be shared between SMT threads, a register array must be
> used. This, however, is not straightforward if every node in the CPU map
> refers to a separate CPU node. Therefore, it is suggested to create a
> separate CPU node for every SMT thread. The L1 cache can be shared if an
> extra node represents it.

I don't understand why a cpu-map is a problem for the SMT case?

I don't think this change is necessary.

Rob
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