[PATCH v7 14/19] dt-bindings: dma: ti: Add K3 PKTDMA V2
Sai Sree Kartheek Adivi <[email protected]>
| Newsgroups | org.kernel.vger.dmaengine,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
New binding document for Texas Instruments K3 Packet DMA (PKTDMA) V2. PKTDMA V2 is introduced as part of AM62L. Signed-off-by: Sai Sree Kartheek Adivi <[email protected]> --- .../bindings/dma/ti/ti,am62l-dmss-pktdma.yaml | 191 ++++++++++++++++++ 1 file changed, 191 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-pktdma.yaml diff --git a/Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-pktdma.yaml b/Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-pktdma.yaml new file mode 100644 index 0000000000000..7173041708369 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-pktdma.yaml @@ -0,0 +1,191 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2026 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/ti/ti,am62l-dmss-pktdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 DMSS PKTDMA V2 + +maintainers: + - Sai Sree Kartheek Adivi <[email protected]> + +description: + The PKTDMA V2 is intended to perform similar functions as the packet mode + channels of K3 UDMA-P. PKTDMA V2 only includes Split channels to service + PSI-L based peripherals. + + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the + legacy peripheral. + +allOf: + - $ref: /schemas/dma/dma-controller.yaml# + +properties: + compatible: + const: ti,am62l-dmss-pktdma + + reg: + items: + - description: Packet DMA Control & Status + - description: Channel Realtime + - description: Ring Realtime + + reg-names: + items: + - const: gcfg + - const: chanrt + - const: ringrt + + "#dma-cells": + const: 2 + description: | + cell 1: Flow ID for the peripheral + This is the hardware flow index assigned to the peripheral. TX flows + use even indices and RX flows use odd indices in an interleaved + manner. For XYMF peripherals (SPI, CRC32) each chip-select/FIFO has + a distinct flow ID; use the flow ID for the specific direction and + chip-select being requested. + + Please refer to the device documentation for the flow map. + + cell 2: ASEL value for the channel + + interrupts: + minItems: 78 + maxItems: 78 + description: + Interrupts for DMA channels. + + interrupt-names: + minItems: 78 + maxItems: 78 + items: + pattern: "^(t|r)flow([0-9]|1[0-3]|1[6-9]|2[0-9]|3[0-9]|4[0-7]|6[4-9]|7[0-9]|9[6-9]|10[0-9]|11[01])$" + description: + The name of the interrupt corresponding to the DMA flow. + TX flows use the "tflow" prefix, RX flows use the "rflow" prefix. + +required: + - compatible + - reg + - reg-names + - "#dma-cells" + - interrupts + - interrupt-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + dma-controller@485c0000 { + compatible = "ti,am62l-dmss-pktdma"; + reg = <0x485c0000 0x4000>, + <0x48900000 0x80000>, + <0x47200000 0x100000>; + reg-names = "gcfg", "chanrt", "ringrt"; + + #dma-cells = <2>; + + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 511 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 484 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 493 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "rflow0", "tflow1", "rflow2", "tflow3", "rflow4", + "tflow5", "rflow6", "tflow7", "rflow8", "tflow9", + "rflow10", "tflow11", "rflow12", "tflow13", + "rflow16", "tflow17", "rflow18", "tflow19", + "rflow20", "tflow21", "rflow22", "tflow23", + "rflow24", "tflow25", "rflow26", "tflow27", + "rflow28", "tflow29", "rflow30", "tflow31", + "rflow32", "tflow33", "rflow34", "tflow35", + "rflow36", "tflow37", "rflow38", "tflow39", + "rflow40", "tflow41", "rflow42", "tflow43", + "rflow44", "tflow45", "rflow46", "tflow47", + "tflow64", "tflow65", "tflow66", "tflow67", + "tflow68", "tflow69", "tflow70", "tflow71", + "tflow72", "tflow73", "tflow74", "tflow75", + "tflow76", "tflow77", "tflow78", "tflow79", + "rflow96", "rflow97", "rflow98", "rflow99", + "rflow100", "rflow101", "rflow102", "rflow103", + "rflow104", "rflow105", "rflow106", "rflow107", + "rflow108", "rflow109", "rflow110", "rflow111"; + }; -- 2.54.0