Re: [PATCH v2] dmaengine: xilinx_dma: Fix hardware buffer descriptor chain after cyclic DMA

On 8/18/2026 1:06 PM, Alex Bereza wrote:
> Using the DMA in cyclic mode modifies the hardware buffer descriptor
> chain in xilinx_dma_prep_dma_cyclic so that the last descriptor used by
> the cyclic transfer points back to the first descriptor, but it never
> restores the original descriptor ring. This breaks using non-cyclic mode
> after cyclic mode with an error like:
> 
>    xilinx-vdma 86000000.dma: Channel 00000000354d5c8d has errors 100, cdr 6de40000 tdr 6de40400
> 
> The only way to get out of this error state is to rebuild the hardware
> buffer descriptor ring by releasing and re-acquiring the channel.
> 
> Fix using non-cyclic mode after cyclic mode by always restoring the
> original buffer descriptor ring in the same manner as it is set up by
> xilinx_dma_alloc_chan_resources().
> 
> Fixes: 23059408b6a3 ("dmaengine: xilinx_dma: Fix race condition in the driver for multiple descriptor scenario")
> Signed-off-by: Alex Bereza <[email protected]>

Reviewed-by: Suraj Gupta <[email protected]>

Thanks,
Suraj

> ---
> Changes in v2:
> - Use pointer arithmetic instead of potential 64 bit division in
>    xilinx_dma_clean_hw_desc() as suggested by Frank Li
>    <[email protected]> and sashiko-bot - Thanks!
> - Link to v1: https://patch.msgid.link/20260817-fix-hw-buf-desc-after-cyclic-mode-v1-1-1fe47e701d6c@bereza.email
> 
> To: Vinod Koul <[email protected]>
> To: Frank Li <[email protected]>
> To: Michal Simek <[email protected]>
> To: Kedareswara rao Appana <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> ---
>   drivers/dma/xilinx/xilinx_dma.c | 24 +++++++++++++++++-------
>   1 file changed, 17 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index bef2b031dba1..650e078fcdb7 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -756,15 +756,25 @@ xilinx_aximcdma_alloc_tx_segment(struct xilinx_dma_chan *chan)
>   	return segment;
>   }
>   
> -static void xilinx_dma_clean_hw_desc(struct xilinx_axidma_desc_hw *hw)
> +static void xilinx_dma_clean_hw_desc(struct xilinx_dma_chan *chan,
> +				     struct xilinx_axidma_tx_segment *segment)
>   {
> -	u32 next_desc = hw->next_desc;
> -	u32 next_desc_msb = hw->next_desc_msb;
> +	dma_addr_t next;
> +	u32 i;
>   
> -	memset(hw, 0, sizeof(struct xilinx_axidma_desc_hw));
> +	/*
> +	 * Restore the buffer descriptor's next descriptor pointer to the value
> +	 * set up in xilinx_dma_alloc_chan_resources(). Otherwise using the DMA
> +	 * in cyclic mode leaves the next descriptor pointer altered and
> +	 * prevents subsequent non-cyclic transfers.
> +	 */
> +	i = segment - chan->seg_v;
> +	next = chan->seg_p +
> +	       sizeof(*chan->seg_v) * ((i + 1) % XILINX_DMA_NUM_DESCS);
>   
> -	hw->next_desc = next_desc;
> -	hw->next_desc_msb = next_desc_msb;
> +	memset(&segment->hw, 0, sizeof(segment->hw));
> +	segment->hw.next_desc = lower_32_bits(next);
> +	segment->hw.next_desc_msb = upper_32_bits(next);
>   }
>   
>   static void xilinx_mcdma_clean_hw_desc(struct xilinx_aximcdma_desc_hw *hw)
> @@ -786,7 +796,7 @@ static void xilinx_mcdma_clean_hw_desc(struct xilinx_aximcdma_desc_hw *hw)
>   static void xilinx_dma_free_tx_segment(struct xilinx_dma_chan *chan,
>   				struct xilinx_axidma_tx_segment *segment)
>   {
> -	xilinx_dma_clean_hw_desc(&segment->hw);
> +	xilinx_dma_clean_hw_desc(chan, segment);
>   
>   	list_add_tail(&segment->node, &chan->free_seg_list);
>   }
> 
> ---
> base-commit: 0d995da5fb97e8c312834575604d4423eb6225b7
> change-id: 20260817-fix-hw-buf-desc-after-cyclic-mode-cf0a7834ab50
> 
> Best regards,
> --
> Alex Bereza <[email protected]>