[PATCH v4 00/10] KVM: SEV: Add support for IBPB-on-Entry and BTB Isolation
Kim Phillips <[email protected]> Tue, 4 Aug 2026 18:56:01 -0500
| Newsgroups | org.kernel.vger.kvm,dev.linux.lists.linux-coco,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
IBPB-on-Entry and BTB Isolation are supplemental Spectre V2 mitigations available to SNP guests. Patch 1 fixes a misleading no-spectre-v2-mitigation error when the kernel isn't compiled with retpolines, but a user can still select AutoIBRS, for example. Patch 2 fixes a longstanding bug where users weren't able to force Automatic IBRS on SNP enabled machines using spectre_v2=eibrs. Patch 3 allows AutoIBRS to be used on a kernel compiled without retpolines. Patch 4 fixes another longstanding bug where users couldn't select legacy / toggling SPEC_CTRL[IBRS] on AMD systems. Users of the BTB Isolation feature may use IBRS to mitigate possible performance degradation caused by BTB Isolation. Patches 5, 6, 7 and 8 deal with code refactoring as a result of Sean's review of the v2 IBPB-on-Entry series: an SNP-only feature mask. Patch 9 adds support for IBPB-on-Entry. Patch 10 adds support for BTB Isolation. Based on tip/master (currently fd0ece3c0826): https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip This v4 series now also available here: https://github.com/AMDESE/linux/tree/btb-isol-latest Advance qemu bits (to add feature on/off switches) available here: https://github.com/AMDESE/qemu/tree/btb-isol-latest Qemu bits will be posted upstream once kernel bits are merged. They depend on Naveen Rao's "target/i386: SEV: Add support for enabling VMSA SEV features": https://lore.kernel.org/qemu-devel/[email protected]/ v4: - Ran Sashiko in a loop until all(?) its comments were addressed (Boris) v3: - https://lore.kernel.org/kvm/[email protected]/ - Merged IBPB-on-Entry and BTB Isolation into single patchseries - Addressed comments from Sean Christopherson, Pawan Gupta, kernel test robot - Simplified unnecessarily complicated logic in spectre_v2=eibrs-with-SNP fix - Reworded, rebased features on top of new SNP_ONLY_MASK etc. changes v2: [IBPB-on-Entry] - https://lore.kernel.org/kvm/[email protected]/ - Change first patch's title (Nikunj) - Add reviews-by (Nikunj, Tom) - Change second patch's description to more generally explain what the patch does (Boris) - Add new, third patch renaming SNP_FEATURES_PRESENT->SNP_FEATURES_IMPL [BTB Isolation] - https://lore.kernel.org/kvm/[email protected]/ - Patch 1/3: - Address Dave Hansen's comment to adhere to using the IBRS_ENHANCED Intel feature flag also for AutoIBRS. v1: [IBPB-on-Entry] https://lore.kernel.org/kvm/[email protected]/ [BTB Isolation] https://lore.kernel.org/kvm/[email protected]/ Kim Phillips (10): x86/bugs: Only log missing retpoline when it's actually the missing mitigation cpu/bugs: Allow forcing Automatic IBRS with SNP active using spectre_v2=eibrs cpu/bugs: Fall back to AutoIBRS when retpoline unavailable on SNP CPUs cpu/bugs: Allow spectre_v2=ibrs on x86 vendors other than Intel KVM: SEV: Define SVM_SEV_FEAT_* flags using BIT_ULL() KVM: selftests: sev_init2: Use BIT_ULL for VMSA feature bit definition KVM: SEV: Disallow setting SNP-only features for non-SNP guests via a single mask KVM: SEV: Advertise SVM_SEV_FEAT_SNP_ACTIVE KVM: SEV: Add support for IBPB-on-Entry KVM: SEV: Add support for SNP BTB Isolation arch/x86/Kconfig | 7 +- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/svm.h | 17 +++-- arch/x86/kernel/cpu/bugs.c | 71 ++++++++++++++----- arch/x86/kernel/cpu/common.c | 6 +- arch/x86/kvm/svm/sev.c | 18 ++++- tools/arch/x86/include/asm/cpufeatures.h | 1 + .../selftests/kvm/x86/sev_init2_tests.c | 20 ++++-- 8 files changed, 103 insertions(+), 38 deletions(-) base-commit: fd0ece3c082632334ded22076932b302a048c7de -- 2.43.0