[PATCH 15/23] KVM: x86/pmu: Relax MSR intercept policy under PerfMon masking

When a PerfMon mask is configured for the guest, hardware already
delivers #GP(0) on RDPMC for any counter or PERF_METRICS whose
corresponding PerfMon mask bit is clear, so KVM does not need to
intercept RDPMC, nor separately gate access in software, to enforce
the same restriction.

No changes are needed in intel_emulate_rdpmc(): the existing checks
already fully reflect the PerfMon mask restrictions for GP counters,
fixed counters, and PERF_METRICS respectively.

Similarly, guest reads of IA32_PERF_GLOBAL_CTRL are subject to a
logical AND with the PerfMon mask, and writes cause a #GP(0) if the
guest attempts to set a bit whose corresponding bit in the PerfMon
mask is clear.

Signed-off-by: Zide Chen <[email protected]>
---
 arch/x86/kvm/pmu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index c447f32c1cb1..337d2f55a216 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -808,6 +808,14 @@ static bool kvm_need_any_pmc_intercept(struct kvm_vcpu *vcpu)
 	if (!kvm_vcpu_has_mediated_pmu(vcpu))
 		return true;
 
+	/*
+	 * When PerfMon mask is enabled, KVM need not intercept RDPMC or
+	 * accesses to IA32_PERF_GLOBAL_CTRL, as hardware blocks or filters
+	 * out access to non-guest-owned RDPMC indices or GLOBAL_CTRL bits.
+	 */
+	if (kvm_vcpu_has_perfmon_mask(vcpu))
+		return false;
+
 	/*
 	 * Note!  Check *host* PMU capabilities, not KVM's PMU capabilities, as
 	 * KVM's capabilities are constrained based on KVM support, i.e. KVM's
-- 
2.55.0